Connectivity Project Engineer, Principal

Qualcomm • Toronto, ON

5d

About The Position

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.
Qualcomm Data Center team is developing high-performance, energy-efficient server solutions for data center applications. We are looking for highly talented, innovative, teamwork-oriented individuals for our cutting-edge technology work!
Our Mission
We are dedicated to transforming the industry by reimagining silicon and developing next-generation computing platforms. By joining our team, you’ll collaborate with world-class engineers to create innovative solutions that push the limits of performance, energy efficiency, and scalability. Our focus is on developing server-class, high-performance solutions that are highly optimized for the needs of the server product.
Connectivity Project Engineer, Principal
We are seeking highly experienced engineering leads to join our team. If you possess a deep understanding of datacenter SoCs and have a passion for architecting and designing complex, high-performance and low-power designs at advanced process nodes, we would be pleased to hear from you.
This critical role has responsibility for planning and executing projects through all phases from concept to commercialization across all engineering teams.
The ideal candidate will have extensive knowledge of semiconductor architecture, design, test and commercialization of data center SoCs with a large mixed-signal SerDes component. The candidate is expected to work closely with other cross-functional leads of the product and drive resolution of all engineering issues within and across subsystems and chipset components. Ability to clearly communicate the engineering status of the project to senior management is essential for excelling in this position.

Requirements

• Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
• 15 years of experience in semiconductor product development. Examples include mixed-signal design, system design, SoC architecture, hardware design and validation, silicon test, SoC firmware development.
• More than 10 years of experience in one or more areas of semiconductor product development.
• More than 5 years in a technical leadership role.
• Expertise in architecting, designing and/or validating high-performance solutions in multiple functional areas of high performance SoCs. Examples include mixed-signal interfaces including SerDes and DDR, embedded processors, IO chiplets, power management, high-volume manufacturing.
• Experience in one or more aspects of commercializing a chipset including post-silicon validation, power and thermal convergence, silicon characterization and test, compliance certifications, etc.
• Five or more years of experience in engineering trade-off analysis.
• Demonstrated track record in hyperscale data center solutions.
• Must have good communication skills and be able to work in a dynamic environment with senior engineers and technologists.

Nice To Haves

• Experience developing high-speed Ethernet or PCIe SerDes IP or SerDes-based Ethernet or PCIe products is preferred.

Responsibilities

• Oversee chipset development and ensure key performance indicators (KPIs) are met - including PPA, schedule, cost - by working with various domain experts.
• Drive resolution of all engineering issues within the chipset and across various functional blocks and components of the chipset.
• Identify key risks to the project and mitigate them
• Identify gaps in existing processes and influence development of new methodologies to ensure product KPIs and specifications are met
• Report periodically to senior management on program status, progress, gaps and risks

What This Job Offers

• Job Type: Full-time
• Career Level: Principal
• Education Level: Ph.D. or professional degree