CAD/EDA Engineer I, CAD/EDA Engineer II, Senior CAD/EDA Engineer, Texas Institute for Electronics

University of Texas at Austin • Austin, TX

3d • Onsite

About The Position

The Texas Institute for Electronics (TIE) is a public-private partnership focused on advancing semiconductor systems and defense electronics. TIE is developing cutting-edge semiconductor manufacturing equipment and processes to restore U.S. leadership in semiconductor manufacturing. They are seeking motivated individuals to join their team. TIE is part of the Cockrell School of Engineering at The University of Texas at Austin (UT Austin), a leading institution in technology innovation and engineering education. UT Austin is known for its strong engineering programs, research centers, and its location in Austin, Texas. The university emphasizes that 'What starts here changes the world' and offers a meaningful work environment. UT Austin provides comprehensive employee benefits and total rewards packages.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Science or closely related field.
• Minimum of three years industry experience (for Engineer II).
• Minimum of ten years industry experience (for Senior Engineer).
• Experience in developing and customizing high performance semiconductor IC design, layout, & validation flows using industry-standard EDA tools (Cadence, Synopsys, Ansys, Siemens…)
• Excellent UNIX and scripting programming skills (Perl, Python, TCL or similar languages).
• Experience with software build automation and version control software.
• Proficiency in both Linux and Windows environments.
• Prior CAD support experience in semiconductor IC design, including oversight of product tapeouts.
• Strong teamwork, collaboration, and communication abilities, with the ability to contribute to company-wide consensus on design flows, tools, and methodologies.
• Ability to thrive in a fast-paced environment and manage multiple projects simultaneously.
• Relevant education and/or industry experience may be substituted as appropriate.

Nice To Haves

• Master’s or advanced degree in semiconductor engineering fields such as Electrical Engineering, Computer Science, or other relevant disciplines.
• Previous experience in setting up and facilitating Design environments and maintaining design kit operability and coordination for cross functional design, modeling, and/or layout teams.
• Previous experience integrating PDK and/or ADK's to enable 2.5D or 3D SoC's.
• Experience evaluating EDA tool capabilities driving EDA vendors to make tool improvements or enable new functions to meet advanced or unique design requirements.
• Experience in a startup or research and development (R&D) environment.

Responsibilities

• Create and maintain scripts/automation to assure compatibility and integration with wide range of EDA IC design/modeling tools to enable simulation/emulation, physical verification, parasitic extraction, and 3DHI modeling.
• Help develop, deploy, and maintain TIE's ADK (Assembly Design Kits).
• Maintain interoperability and compatibility of TIE’s design kits with our partner PDK’s, our internal PDK’s & ADK’s, and vendor EDA tool revisions.
• Developing innovative physical design place & route methodology and flow solutions to meet current and future design challenges.
• Help establish and validate physical design methodologies, flow automation and infrastructure for our internal 3D heterogenous micro-system modeling teams.
• Automation of Test structure layouts to help drive next generation processing capabilities across a wide range of materials.
• Support TIE's standard cell offerings and drive validation/simulation/emulation capability around those standard cells.
• Facilitate and oversee project tapeouts.
• Providing technical leadership, mentoring and customer support for our internal design and 3D modeling teams.

Benefits

• Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
• Voluntary Vision, Dental, Life, and Disability insurance options
• Generous paid vacation, sick time, and holidays
• Teachers Retirement System of Texas, a defined benefit retirement plan, with 7.75% employer matching funds
• Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
• Flexible spending account options for medical and childcare expenses
• Robust free training access through LinkedIn Learning plus professional conference opportunities
• Tuition assistance
• Expansive employee discount program including athletic tickets
• Free access to UT Austin's libraries and museums with staff ID card
• Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card
• Relocation assistance may be available.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level