ASIC Verification Engineer

Advanced Micro Devices, IncONTARIO-HOME OFFICE, Ontario
Hybrid

About The Position

This is an ASIC Verification Engineering role within the Security IP Team (SECIP). The role focuses on co-verification of embedded microprocessor subsystems and associated hardware accelerators in leading-edge SoCs. The ideal candidate will also contribute to firmware development initiatives supporting high-performance subsystems such as security policy management, cryptography, data compression, and high-throughput DMA.

Requirements

  • Strong experience in ASIC firmware and hardware design and verification
  • Proficiency in C, C++, Assembly, Verilog, System Verilog, and scripting languages such as Python, Perl, and Make
  • Deep expertise in UVM and C-DPI methodologies
  • Strong understanding of standard bus/interface protocols (AXI, AHB, AMBA)
  • Experience with firmware development on commercial microprocessors and associated toolchains (compiler, assembler, debugger)
  • Hands-on experience with ASIC verification tools, including simulation, linting, and power-aware verification
  • Bachelor’s degree in electrical or computer engineering required

Nice To Haves

  • master’s or PhD preferred

Responsibilities

  • Develop and verify embedded firmware for SoC secure boot and microprocessor-driven hardware acceleration services, including cryptography, compression, and DMA
  • Perform hardware/firmware co-verification using UVM System Verilog, C-DPI, and FPGA-based prototyping platforms
  • Define and maintain subsystem verification architecture, testbenches, and methodologies for embedded CPU and IP subsystems using AXI/AHB interfaces
  • Collaborate on subsystem specification and influence hardware and firmware co-design, including developing abstracted performance models and evaluating architecture trade-offs
  • Develop and execute block- and subsystem-level test plans using UVM randomized and C-DPI directed methodologies
  • Build and maintain verification infrastructure, including UVCs, system response models, integration scripts, and build/run environments
  • Drive verification closure, improve coverage metrics, and debug complex hardware/firmware interactions
  • Interface with SoC integration and DV teams to support IP-level APIs, SoC-level validation, emulation, silicon bring-up, and debug

Benefits

  • AMD benefits at a glance
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