ASIC Design Verification Engineer

Ericsson • Austin, TX

2d • Hybrid

About The Position

This role is for an ASIC Design Verification Engineer at Ericsson, located in Austin, Texas. This is a hybrid work opportunity, not a remote one. The engineer will be part of the ASIC IP organization, contributing to the verification of ASICs that are the backbone of next-generation 5G networks. The role involves taking ownership across the full verification stack, including TLM modeling for early architectural verification, block- and top-level ASIC/IP verification with a focus on coverage closure, designing and building UVM environments from scratch, and SW-driven verification to bridge hardware and embedded software for real-world behavior verification. This is a hands-on role focused on building, breaking, and finding critical bugs in a fast-moving team environment.

Requirements

• Several years of hands-on, in industry RTL verification experience in IP, ASIC, SoC
• Deep, practical experience with SystemVerilog and UVM
• Proven ability to architect and build testbenches from the ground up
• Block- and/or top-level RTL debug experience
• IP familiarity in one or more of: SerDes, PCIe, ARM Subsystems, DSPs/Accelerators, or Ethernet
• Scripting proficiency — TCL, Python, Perl, or equivalent
• Clear, confident communicator
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent hands-on experience

Nice To Haves

• Experience developing full test plans and directed/randomized test cases from scratch
• Object-oriented programming chops that show up in your verification code
• Embedded software design and test experience
• Fluency in the standard Linux/GIT/LSF development environment
• Hands-on experience with AMBA APB, AXI, ACE-Lite, or CHI interfaces
• Familiarity with computer architecture — CPU pipelines, memory hierarchies, cache coherency protocols
• Early leadership instincts and the hunger to grow them

Responsibilities

• Building transaction-level models that drive early architectural verification
• Owning coverage closure from block to chip for block- and top-level ASIC/IP verification
• Designing and building UVM environments from scratch
• Bridging the gap between hardware and embedded software to verify real-world behavior through SW-driven verification

Benefits

• Choice of three medical plan options
• Dental plan option
• Company credits towards medical and dental premiums
• 401(k) Plan with automatic 3% company contribution
• 401(k) match of $1 for every $1 on the first 3% of eligible pay, plus 50 cents on every $1 on the next 2% of eligible pay
• Company credits for basic life insurance and basic accidental death and dismemberment coverage
• Company credits for short-term and long-term disability coverage
• Option to participate in Ericsson’s Stock Purchase Plan
• 15 days of accrued vacation
• Up to 3 personal days per year
• 11 annual holidays
• 8 hours of volunteer time
• 80 hours of sick time annually
• Up to 16 weeks of paid maternity leave
• 6 weeks of parental or adoption leave at 100% of pay
• Financial wellness programs
• Educational assistance
• Matching gifts
• Recognition programs
• Opportunity for an annual bonus

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Education Level: Associate degree