ASIC Systems Debug Engineer

Ericsson • Austin, TX

34d • Hybrid

About The Position

Ericsson is seeking an experienced ASIC Systems Debug Engineer to own challenging silicon and system-level failure investigations across the product lifecycle, from ASIC bring-up and validation through manufacturing and field deployment. The role works across ASIC design, system architecture, validation, manufacturing, software, and quality to identify root causes, improve product robustness and observability, strengthen defect screening, and inform future silicon designs.

The engineer will lead investigations across multiple IP and system domains; develop structured approaches to reproduce, isolate, and characterize failures; analyze production, repair, test, and field-return data; and turn findings into corrective actions, containment plans, and issue closure. The position also identifies gaps in test coverage and diagnosability, translates debug lessons into requirements for design-for-debug, platform observability, firmware, tools, and failure isolation, and develops automation and methodologies to accelerate system debug. This is a hybrid, on-site position in Austin, Texas and is not open to remote work.

Requirements

• Demonstrated experience leading complex ASIC or SoC system-debug and root-cause investigations.
• A disciplined approach to turning ambiguous symptoms into a structured debug plan.
• Deep understanding of system architecture and hardware, firmware, and software interactions.
• Experience debugging complex ASIC or SoC subsystems, including on-chip interfaces, interconnect and routing fabrics, DMA and data movement, memory access and contention, and multi-IP interactions.
• Experience with high-speed and control interfaces such as DDR, Ethernet, CPRI, JESD, PCIe, I2C, I3C, and SerDes.
• Hands-on silicon and system-level debug experience using lab equipment, hardware debug interfaces, trace capabilities, and low-level register access.
• Experience analyzing production, test, and field data to identify failure patterns, correlations, and signatures.
• Proficiency in scripting or programming for data analysis, debug automation, and engineering-tool development.
• Working knowledge of silicon test and DFX concepts, including structural and functional test, scan, memory test, ATE, test coverage, diagnostics, and production screening.
• Strong technical leadership and communication skills, with the ability to influence decisions and drive investigations across disciplines and organizations.

Responsibilities

• Lead complex ASIC and system investigations across multiple IP and system domains.
• Develop structured strategies to reproduce, isolate, and characterize failures, including cases with unclear failure mechanisms or ownership.
• Investigate silicon quality escapes using production, repair, test, and field-return data.
• Debug complex ASIC subsystems, including DMA engines and data-movement paths, interconnect and routing fabrics, memory systems and access paths, on-chip interfaces, chiplet-to-chiplet communication, and interactions across multiple IP blocks.
• Convert technical findings into corrective actions, production-containment plans, and final issue closure.
• Identify gaps in test coverage, diagnostics, and diagnosability across functional, structural, mission-mode, ATE, system-level, and production environments.
• Improve defect-screening strategies and help prevent recurring silicon escapes.
• Translate debug and field-failure lessons into requirements for ASIC design-for-debug features, platform observability, firmware support, debug and analysis tools, and failure-isolation capabilities.
• Create tools, scripts, automation, techniques, and methodologies to accelerate system debug.
• Help grow system-debug expertise across the organization.

Benefits

• Competitive compensation package; salary range depends on factors including location and job-related qualifications and experience.
• Opportunity for annual bonus through the Short-Term Variable Compensation Plan, subject to eligibility and applicable rules.
• Choice of three medical plan options and a dental plan option, with company credits equal to Ericsson’s cost toward employee and eligible dependent premiums.
• 401(k) plan with automatic 3% company contribution and matching contributions of up to 4% when contributing at least 5% of eligible pay.
• Basic life insurance and accidental death and dismemberment coverage, plus short-term and long-term disability coverage.
• Option to participate in Ericsson’s Stock Purchase Plan.
• Minimum 15 days of accrued vacation, up to 3 personal days per year, 11 annual holidays, 8 hours of volunteer time, and 80 hours of sick time annually; paid time off is prorated based on start date.
• Up to 16 weeks of paid maternity leave and 6 weeks of parental or adoption leave at 100% of pay.
• Financial wellness programs, educational assistance, matching gifts, and recognition programs.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: No Education Listed