ASIC Power Engineer

Apple•Irvine, CA

About The Position

Apple’s wireless system-on-chip (SoC) organization develops wireless silicon, emphasizing energy-efficient, low-power designs and technologies that enhance the product experience. The ASIC Power Engineer will work on low-power architecture, power modeling, analysis, correlation, and silicon validation for wireless communication SoCs. The role contributes to delivering functional products to customers through power-efficient SoC architecture and accurate pre-silicon and post-silicon power work.

Requirements

  • Bachelor’s degree.
  • ASIC power knowledge.
  • Experience with power tools, such as PTPX and Power Artist.
  • Understanding of ASIC logic design.
  • Knowledge of low-power design and UPF.
  • Proficiency in scripting languages such as Shell, Perl, or Python.
  • Basic knowledge of common SoC components, such as CPUs, fabric, peripherals, and PCIe.
  • Strong problem-solving and analytical skills.

Nice To Haves

  • Pre-silicon power estimation experience.
  • Pre-silicon power modeling experience.
  • Wireless knowledge, including Wi-Fi, Bluetooth, and UWB.
  • System architecture experience.
  • Post-silicon power correlation experience.

Responsibilities

  • Define power-efficient SoC architectures and schemes, and write power specifications.
  • Estimate pre-silicon power.
  • Build accurate wireless application and atomic power models.
  • Define and generate power vectors with design and design verification support.
  • Collect pre-silicon power data using power flows and tools.
  • Analyze power data and identify opportunities for power reduction.
  • Support post-silicon power correlation.
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