Entry Level ASIC/FPGA Verification Engineer – Space Electronics - MTV

BoeingMountain View, CA
$79,050 - $106,950Onsite

About The Position

The Boeing Company's Space, Intelligence & Weapons Systems is seeking multiple Entry Level ASIC/FPGA Verification Engineers to join their Boeing Electronic Products team in Mountain View, CA. This team develops ASICs and FPGAs for various Boeing products, including constellation satellite programs and commercial airplanes. They utilize leading-edge technology to create complex SoCs, custom processors, and high-integrity flight computers. The role offers exposure to a diverse development portfolio across Boeing's business units, including Space & Launch, AvionX, Missiles & Weapons, Strike, Surveillance and Mobility, and Autonomous Systems. As an ASIC/FPGA Engineer, you will develop state-of-the-art digital ICs/SoCs, supporting both design and verification for critical programs. The team collaborates globally and supports ASIC/FPGA design and verification for electronics built at various Boeing sites.

Requirements

  • Ability to obtain a US Security Clearance for which the US Government requires US Citizenship as a condition of employment. An interim and/or final U.S. Secret Clearance Post-Start is required.
  • Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement
  • Coursework, Projects, or internship experience with ASIC/FPGA verification
  • Familiarity with Register Transfer Language - e.g. Verilog, VHDL, SystemVerilog

Nice To Haves

  • Bachelor’s Degree in Electrical Engineering or Computer Engineering
  • Experience with hardware emulators, especially Palladium
  • Proficiency with hardware verification languages: System Verilog, System Verilog Assertions
  • Ability to executable test plans
  • Proficiency with Object Oriented Programming Concepts: Inheritance, Polymorphism, etc.
  • Ability to create self-checking and reusable testbenches from scratch
  • Experience developing Functional Coverage Models and Closing Code Coverage
  • Experience with high-speed Serdes interfaces (JESD204C, PCIe, Ethernet)
  • Proficient in scripting languages: Make, Perl, Python, etc.
  • Revision Control Systems: svn, cvs, git
  • Proficient in Linux Environments
  • Familiarity with space-based design techniques and radiation mitigation
  • Demonstrated history of 1st pass success with ASIC designs

Responsibilities

  • Develop FPGA/ASIC designs supporting design and/or verification teams
  • Implement FPGA/ASIC with latest design practices and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs)
  • Integrate DSP IP from Boeing’s algorithm team and third-party IP as needed
  • Perform static timing analysis, LEC, CDC, linting, and other necessary checks to ensure the design is completed on schedule
  • Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation
  • Create self-checking and reusable test benches from scratch, applying Object Oriented Programming concepts such as Inheritance and Polymorphism, and leverage UVM to build agents consisting of drivers, sequencers, monitors, and use of predictors together with scoreboards for checking correctness.
  • Support FPGA-based prototyping and validation depending on program and system requirements and complexity
  • Validate design through hardware integration test with special test equipment, test-beds, and higher-level systems as needed

Benefits

  • health insurance
  • flexible spending accounts
  • health savings accounts
  • retirement savings plans
  • life and disability insurance programs
  • paid and unpaid time away from work
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