ASIC/FPGA Design and Verification Engineer – Space Electronics – (Senior or Principal) - MTV
About The Position
Boeing Space, Intelligence & Weapons Systems is seeking multiple ASIC/FPGA Design and Verification Engineers (Senior or Principal) to join the Boeing Electronic Products team in Mountain View, CA. This team develops ASICs and FPGAs that are integral to Boeing's products, ranging from complex digitally beamformed phased arrays for satellite programs to computing and networking equipment for commercial airplanes. The group utilizes leading-edge technology and collaborates with world-class partners to develop complex SoCs, including high-integrity, low SWAP-C flight computers with the latest ARM IP. The digital IC design processes are applied with industry-best tools for applications across all Boeing domains. The diverse development portfolio offers exposure to the entire Boeing product line, with approximately half of the design work within the Space & Launch business unit and the other half from other Boeing divisions. As an ASIC/FPGA Engineer, you will develop state-of-the-art digital ICs/SoCs for critical programs across the enterprise. This is a period of significant hiring for design and verification engineers at all levels due to a high volume of new projects. Collaboration occurs with other electronics groups globally, supporting ASIC/FPGA design and verification for electronics built in El Segundo or at other sites.
Requirements
- Ability to obtain a US Security Clearance for which the US Government requires US Citizenship as a condition of employment. An interim and/or final U.S. Secret Clearance Post-Start is required.
- Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement.
- 10+ years of ASIC/FPGA design or verification experience.
- Experience with ASIC/FPGA architectural definition, and detailed design implementation and functional verification using SystemVerilog with delivery/release of production designs.
- Professional experience with hardware-based integration and test of ASIC/FPGA designs.
Nice To Haves
- Principal, Level 6: 20+ years of related work experience or an equivalent combination of education and experience.
- Master's Degree in EE, Computer Engineering/Science, or related field, or equivalent experience.
- Proven record of leading ASIC/FPGA design and/or verification teams, including tracking and reporting progress to stakeholders.
- Experience with hardware emulators, especially Palladium.
- Proficiency with hardware verification languages: System Verilog, System Verilog Assertions.
- Ability to executable test plans.
- Proficiency with Object Oriented Programming Concepts: Inheritance, Polymorphism, etc.
- Ability to create self-checking and reusable testbenches from scratch.
- Experience developing Functional Coverage Models and Closing Code Coverage.
- Experience with high-speed Serdes interfaces (JESD204C, PCIe, Ethernet).
- Proficient in scripting languages: Make, Perl, Python, etc.
- Revision Control Systems: svn, cvs, git.
- Proficient in Linux Environments.
- Familiarity with space-based design techniques and radiation mitigation.
- Demonstrated history of 1st pass success with ASIC designs.
Responsibilities
- Conduct unit-level testing, verification, and validation of embedded software and firmware, utilizing debugging tools like oscilloscopes and logic analyzers to identify and resolve issues.
- Create and maintain technical documentation, including requirements documents, design specifications, test plans, and interface control documents.
- Support the integration of software and hardware components, from initial hardware bring-up to final system validation.
- Analyze and enhance the efficiency, stability, scalability, and performance of system resources, often within the constraints of low power or memory.
- Lead FPGA/ASIC designs, including multi-FPGA/ASIC programs and teams with design and verification engineers, and manage team execution to meet program milestones.
- Collaborate with customers, system engineers, and hardware engineers to drive requirements capture and architect digital logic functions to meet mission/customer needs.
- Explore trade-space of potential ASIC/FPGA technologies and determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance.
- Implement FPGA/ASIC with latest design practices and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs).
- Integrate DSP IP from Boeing’s algorithm team and third-party IP as needed.
- Perform static timing analysis, LEC, CDC, linting, and other necessary checks to ensure the design is completed on schedule.
- Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation.
- Create self-checking and reusable test benches from scratch, applying Object Oriented Programming concepts such as Inheritance and Polymorphism, and leverage UVM to create drivers, monitors, predictors, and scoreboards.
- Drive FPGA-based prototyping and validation depending on program and system requirements and complexity.
- Validate design through hardware integration test with special test equipment, test-beds, and higher-level systems as needed.
- Train and mentor less senior engineers across the department and help build effective project teams.
Benefits
- health insurance
- flexible spending accounts
- health savings accounts
- retirement savings plans
- life and disability insurance programs
- paid and unpaid time away from work
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What This Job Offers
Job Type
Full-time
Career Level
Senior
