ASIC & FPGA Design Engineer Senior Staff

Lockheed Martin•Andover, MA

1d•Onsite

About The Position

You will be the ASIC & FPGA Design Engineer for the Andover, MA Advanced Defense Systems team. Our group creates the programmable logic heart beats that power both current and next generation defense platforms, delivering high reliability, multi function modules on accelerated schedules. As the ASIC & FPGA Design Engineer you will own the full life cycle of complex FPGA solutions—from initial specification through production release—while mentoring teammates and collaborating with software, hardware, and systems engineers to turn system concepts into field ready hardware.

Requirements

Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education
HDL programming experience with VHDL, Verilog, and/or System Verilog.
Experience in Hardware-Software Integration and Validation.
Experience with Xilinx FPGAs and related toolsets such as Vivado.
Experience with FPGA simulation tools and languages such as Synopsys VCS and SystemVerilog.
Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity.
Extensive experience with troubleshooting designs and resolving integration issues.
Excellent communication and presentation skills.
Candidate must be eligible to obtain a Secret Clearance and be able to obtain at least an Interim Secret Clearance before starting the position, therefore you must be a US Citizen.

Nice To Haves

Master of Science Degree in Electrical Engineering or closely related technical field.
Active DoD Secret or Top Secret Clearance
Significant relevant experience in the defense electronics industry, including FPGA development for RF systems.
Experience with version control systems, such as Git
Experience with multiple FPGA vendors, such as Altera or Microchip
Knowledge of software programming languages, such as C, C++, or Python
Experience with debugging and troubleshooting complex digital systems
Knowledge of UVM and experience with UVM-based verification methodologies
Experience with the MFC DAR process
Experience with Missile systems
Experience with Missile Safety
Extensive experience with troubleshooting designs and resolving integration issues in a production or manufacturing environment.
Expertise with datalink or T/R module architecture.
Expertise with technical documentation such as specifications, schematic drawings, and test data.
Experience with customer interface including technical presentations.
Ability to lead failure investigations on production and/or technical issues.
Ability work in a team collaborative environment especially with manufacturing and industrial engineers and/or operator on production support.

Responsibilities

Defining FPGA architecture, writing clean RTL (VHDL/Verilog/SystemVerilog), and producing complete design packages that meet performance, power, and thermal targets.
Performing synthesis, place and route, and timing closure activities using industry standard toolchains (e.g., Xilinx Vivado, Intel Quartus).
Conducting trade studies to select the optimal device, balancing logic utilization, power consumption, cost, and risk.
Building robust verification environments (UVM, SystemC, Python based testbenches) and generating comprehensive test plans to prove functional correctness and timing margins.
Leading hardware in the loop testing, board level debugging, and integration with subsystem hardware.
Managing configuration control and version controlled repositories (GitLab or equivalent), ensuring full traceability of all artifacts.
Producing design documentation—specifications, interface control documents, verification reports, and release packages—that complies with aerospace and Lockheed Martin standards.
Collaborating with cross functional teams to develop FPGA requirements, resolve implementation challenges, and meet program milestones.
Acting independently to investigate and solve complex programmable logic issues that arise during development or production.
Mentoring junior engineers, sharing best practices, and fostering an inclusive, high performance team culture.
Working closely with technical and manufacturing support personnel to guarantee smooth product ramp up and sustained production.