About The Position

The Boeing Company is hiring Lead, Senior, and Principal ASIC/FPGA Design and Verification Engineers for its Boeing Electronic Products team in Albuquerque, New Mexico. The team develops digital ICs and SoCs for programs across Boeing, including Space & Launch, AvionX, Missiles & Weapons, Strike, Surveillance and Mobility, and Autonomous Systems. Its work includes complex digitally beamformed phased arrays, computing and networking equipment, custom processors, and high-integrity, low-SWAP-C flight computers. Within the LEOS team, the position supports high-performance laser gimbal control systems and the development of FPGA designs and embedded software. The engineer works with cross-functional teams to define system requirements, architect and implement digital logic, and ensure software and hardware compatibility. Responsibilities span design and verification from architecture and HDL coding through physical design realization, as well as prototyping, hardware integration, and validation. Lead-level work includes managing design and verification teams and program execution. The role also includes mentoring less senior engineers. The position is for 1st shift and is based in Albuquerque. Relocation may be offered depending on eligibility. Candidates must be able to obtain a U.S. Secret clearance after starting; U.S. citizenship is required for that clearance. U.S. export-control compliance requires the candidate to be a U.S. Person. The employer will not sponsor employment visas. The role is not contingent on program award and is not safety-sensitive.

Requirements

  • Bachelor of Science degree in Engineering, Computer Science, Data Science, Mathematics, Physics, Chemistry, or a directly related equivalent qualification.
  • At least 9 years of ASIC/FPGA design or verification experience, or a master's degree and at least 7 years of such experience.
  • Experience with ASIC/FPGA architectural definition, detailed design implementation, and functional verification using SystemVerilog, including delivery or release of production designs.
  • Professional experience with hardware-based integration and testing of ASIC/FPGA designs.
  • Ability to obtain a U.S. Security Clearance; U.S. citizenship is required for the clearance, and an interim and/or final U.S. Secret Clearance is required after starting.
  • Must meet U.S. export-control compliance requirements as a U.S. Person.
  • Must satisfy Boeing's Conflict of Interest assessment process.

Nice To Haves

  • Senior, Level 5: 14 or more years of related work experience or an equivalent combination of education and experience.
  • Principal, Level 6: 20 or more years of related work experience or an equivalent combination of education and experience.
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent experience.
  • Demonstrated leadership of ASIC/FPGA design or verification teams, including tracking and reporting progress to stakeholders.
  • Experience with hardware emulators, especially Palladium.
  • Proficiency with hardware verification languages, including SystemVerilog and SystemVerilog Assertions.
  • Ability to execute test plans.
  • Proficiency in object-oriented programming concepts, including inheritance and polymorphism.
  • Ability to create self-checking, reusable test benches from scratch.
  • Experience developing functional coverage models and closing code coverage.
  • Experience with high-speed SerDes interfaces such as JESD204C, PCIe, and Ethernet.
  • Proficiency in scripting languages such as Make, Perl, and Python.
  • Experience with revision control systems such as SVN, CVS, and Git.
  • Proficiency in Linux environments.
  • Familiarity with space-based design techniques and radiation mitigation.
  • Demonstrated history of first-pass success with ASIC designs.
  • ABET accreditation is preferred, but not required.

Responsibilities

  • Lead FPGA/ASIC designs, including multi-FPGA/ASIC programs and design and verification teams, and manage execution to meet program milestones.
  • Collaborate with customers, system engineers, and hardware engineers to capture requirements and architect digital logic functions for mission and customer needs.
  • Evaluate FPGA/ASIC technology trade-offs and select parts by weighing schedule, cost, risk, area, and power against performance.
  • Implement FPGA/ASIC designs using current practices and tools, from block-level microarchitecture and HDL coding through physical design realization and gate-level netlists for ASIC designs.
  • Integrate DSP IP from Boeing's algorithm team and third-party IP as needed.
  • Perform static timing analysis, LEC, CDC, linting, and other checks to complete designs on schedule.
  • Develop functional coverage models and perform code coverage to verify designs in simulation.
  • Create self-checking, reusable test benches from scratch, applying object-oriented programming concepts and using UVM to create drivers, monitors, predictors, and scoreboards.
  • Drive FPGA-based prototyping and validation as required by program and system needs.
  • Validate designs through hardware integration testing with special test equipment, test beds, and higher-level systems as needed.
  • Conduct unit-level testing, verification, and validation of embedded software and firmware, using debugging tools such as oscilloscopes and logic analyzers to identify and resolve issues.
  • Create and maintain requirements documents, design specifications, test plans, and interface control documents.
  • Support hardware and software integration from initial hardware bring-up through final system validation.
  • Analyze and improve system-resource efficiency, stability, scalability, and performance, including under low-power or memory constraints.
  • Train and mentor less senior engineers and help build effective project teams.

Benefits

  • Competitive base pay and variable compensation opportunities.
  • Eligible employees may enroll in health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance, and paid and unpaid time-away programs.
  • Relocation may be offered based on candidate eligibility.
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