ASIC Engineering Technical Leader
About The Position
As a key technical leader, you will be a hands-on expert driving the definition, architecture, design, and productization of high-performance mixed-signal ASICs, subsystems, or specialized domains like DFT. You will own the architecture and definition for blocks, subsystems, or DFT frameworks, partnering with domain experts to solve complex, cross-functional challenges. You will lead project-level design and champion methodology developments that can be scaled seamlessly across multiple product lines. You will create and implement robust verification strategies, establishing approaches suited for both high-speed digital and custom analog blocks. You will collaborate effectively across cross-functional teams like library, process, PnR, Test Engineering, and Operations. You will develop reusable designs and automated flows/scripts for the team. You will lead technical engagements with tool vendors and IP suppliers. You will utilize AI and agent-based script creation, verification, and debug flows to drive maximum efficiency and rapid time-to-market.
Requirements
- Bachelors + 12 years of related experience, or Masters + 8 years of related experience, or PhD + 5 years of related experience
Nice To Haves
- Experience owning DFT architecture development for an SoC, guiding the product from concept through implementation and mass production.
- Experience implementing at-speed scan, MBIST, BISR, boundary-scan, and custom techniques for parametric testing of analog and mixed-signal blocks.
Responsibilities
- Own the architecture and definition for blocks, subsystems, or DFT frameworks, partnering with domain experts to solve complex, cross-functional challenges.
- Lead project-level design and champion methodology developments that can be scaled seamlessly across multiple product lines.
- Create and implement robust verification strategies, establishing approaches suited for both high-speed digital and custom analog blocks.
- Collaborate effectively across cross-functional teams like library, process, PnR, Test Engineering, and Operations.
- Develop reusable designs and automated flows/scripts for the team.
- Lead technical engagements with tool vendors and IP suppliers.
- Utilize AI and agent-based script creation, verification, and debug flows to drive maximum efficiency and rapid time-to-market.
Benefits
- medical, dental and vision insurance
- a 401(k) plan with a Cisco matching contribution
- paid parental leave
- short and long-term disability coverage
- basic life insurance
- grants of Cisco restricted stock units
- 10 paid holidays per full calendar year
- 1 floating holiday for non-exempt employees
- 1 paid day off for employee’s birthday
- paid year-end holiday shutdown
- 4 paid days off for personal wellness
- 16 days of paid vacation time per full calendar year (non-exempt)
- flexible vacation time off program (exempt)
- 80 hours of sick time off provided on hire date and each January 1st thereafter
- up to 80 hours of unused sick time carried forward from one calendar year to the next
- Additional paid time away may be requested to deal with critical or emergency issues for family members
- Optional 10 paid days per full calendar year to volunteer
- annual bonuses (non-sales roles)
- performance-based incentive pay (sales roles)
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What This Job Offers
Job Type
Full-time
Career Level
Senior
