ASIC Digital Design Technical Leader

Cisco•Upper Macungie Township, PA
•$177,600 - $257,400

About The Position

The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. As a Digital Design Technical Leader for Silicon One Optics, you won’t just be building chips—you will architect the backbone of next-generation optical interconnects. From initial concept to tapeout and post-silicon production, you will own the full ASIC lifecycle and lead cross-functional engineering teams across digital, analog, firmware, and physical design. In this high-stakes role, you will define digital architectures, spearhead the integration of cutting-edge high-speed IPs (ODSP, D2D IP, SerDes XSR/PAM4), and optimize power and performance for 100G, 200G, and 400G silicon photonics and Co-Packaged Optics. This is your opportunity to drive technical strategy, pioneer breakthrough interconnect innovations, and deliver silicon that powers the future of high-performance computing.

Requirements

  • Bachelors + 12 years of related experience, or Masters + 8 years of related experience, or PhD + 5 years of related experience.
  • Prior digital design experience working with FSMs, CPU sub-systems, complex SoCs, and FPGA validation
  • Prior experience in managing the complete ASIC/SoC design flow
  • Prior experience with one more more key bus and interface protocols (e.g., SPI, I2C, APB, AXI) as well as high-speed SerDes, Ethernet, and/or D2D PHY IP.

Nice To Haves

  • Prior experience leading the architecture and design of complex digital blocks and CPU subsystems from pre-silicon RTL to GDS2 signoff, through post-silicon FPGA prototyping, lab validation, and ATE bring-up.
  • Prior experience developing top and block-level specifications for high-speed datapath and low-speed control planes, including power/timing budgeting, feedback/control system stability, and hardware vs. firmware trade-offs.
  • Prior experience reviewing verification coverage metrics, independently debugging verification issues, supporting firmware-based verification/architecture, and integrating SerDes and DSP IP.
  • Hands-on experience with backend implementation activities—including synthesis, timing closure, DFT, low-power design, design automation scripting, and QOR metric processing.
  • 6+ years in a technical leadership role collaborating across cross-functional engineering teams to resolve technical trade-offs and complex design issues.

Responsibilities

  • Define digital architectures
  • Spearhead the integration of cutting-edge high-speed IPs (ODSP, D2D IP, SerDes XSR/PAM4)
  • Optimize power and performance for 100G, 200G, and 400G silicon photonics and Co-Packaged Optics
  • Drive technical strategy
  • Pioneer breakthrough interconnect innovations
  • Deliver silicon that powers the future of high-performance computing
  • Lead cross-functional engineering teams across digital, analog, firmware, and physical design
  • Own the full ASIC lifecycle from initial concept to tapeout and post-silicon production

Benefits

  • medical, dental and vision insurance
  • a 401(k) plan with a Cisco matching contribution
  • paid parental leave
  • short and long-term disability coverage
  • basic life insurance
  • grants of Cisco restricted stock units
  • 10 paid holidays per full calendar year
  • 1 floating holiday for non-exempt employees
  • 1 paid day off for employee’s birthday
  • paid year-end holiday shutdown
  • 4 paid days off for personal wellness
  • 16 days of paid vacation time per full calendar year (non-exempt)
  • flexible vacation time off program (exempt)
  • 80 hours of sick time off
  • 10 paid days per full calendar year to volunteer
  • annual bonuses (for non-sales roles)
  • performance-based incentive pay (for sales roles)
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