As an ASIC DFT - Emulation Technical Lead, you will play a critical role in driving the DFT emulation strategy for Silicon One. You’ll architect state-of-the-art emulation environments, lead pre-silicon test plan execution, and validate complex scan, MBIST, and JTAG architectures on platforms like Palladium, Veloce, or Zebu. Partnering closely with front-end RTL, physical design, and ATPG teams, you will troubleshoot critical issues and ensure high-quality post-silicon pattern conversion. Your technical leadership and cross-functional collaboration will guarantee seamless silicon bring-up and optimal test coverage across next-generation hardware platforms.
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Job Type
Full-time
Career Level
Senior