ASIC Design Verification Engineer I (Full Time) - United States

Cisco•San Jose, CA

About The Position

The ASIC Design Verification Engineer I will help develop Cisco data center solutions by verifying ASICs in simulation, emulation, and during ASIC bring-up. The role collaborates with verification engineers, designers, hardware teams, and other cross-functional partners to support seamless integration and optimal performance of Cisco hardware platforms. The engineer maintains and enhances existing design-verification environments, builds test benches for new blocks, writes test plans and test cases, debugs regression failures, and drives module verification to closure. The role also helps ensure complete verification coverage through the implementation and review of code and functional coverage. This posting advertises potential opportunities; the exact role may not be open currently. Applications are accepted until further notice, and Cisco may contact applicants if a relevant position opens.

Requirements

Bachelor's degree completed within the past 3 years or expected to be completed within the next 12 months.
Qualifying education or work experience in ASIC Design, Design Verification, ASIC Engineering, Verification, or a related field.
Experience with SystemVerilog and UVM methodology.
Experience with scripting using Perl and/or Python.

Nice To Haves

Experience using UVM and SystemVerilog for ASIC verification, including verification of complex blocks and/or clusters within ASICs.
Experience with functional coverage and constrained-random design-verification environments.
Experience verifying complex blocks, clusters, and top-level SoC.
Experience with Veloce/HAPS.
Experience building test benches from scratch, including use of SystemVerilog constraints, structures, and classes.
Effective verbal and written communication skills.

Responsibilities

Maintain existing design-verification environments and enhance them.
Construct test benches for new blocks, including scoreboards, agents, sequencers, and monitors.
Write test plans and develop test cases.
Debug regression failures and drive module verification to closure.
Ensure complete verification coverage through implementation and review of code and functional coverage.
Verify ASICs in simulation, emulation, and during ASIC bring-up in collaboration with verification engineers, designers, hardware teams, and other cross-functional teams.

Benefits

Medical, dental, and vision insurance, subject to plan eligibility rules.
401(k) plan with a Cisco matching contribution.
Paid parental leave.
Short- and long-term disability coverage.
Basic life insurance.
Cisco restricted stock unit grants may be available, subject to eligibility and continued-employment vesting conditions.
10 paid holidays per full calendar year, plus one floating holiday for non-exempt employees.
One paid day off for an employee’s birthday, a paid year-end holiday shutdown, and four paid personal-wellness days.
Non-exempt employees receive 16 days of paid vacation per full calendar year; exempt employees participate in a flexible vacation program with no defined usage limit, subject to availability and business limitations.
80 hours of sick time off provided on hire and each January 1, with up to 80 unused hours carried forward.
Additional paid time away may be requested for critical or emergency family-member issues.
Optional 10 paid volunteer days per full calendar year.
Employees in non-sales roles are eligible to earn annual bonuses, subject to Cisco policies.