ASIC Clocks Verification Engineer - New College Grad 2026

NVIDIA•Santa Clara, CA
•$116,000 - $189,750•Hybrid

About The Position

The GPU clocks group is looking for an exceptional ASIC Clocks Verification Engineer. The team is responsible for crafting all aspects of GPU clocking. The team collaborates with the front design team to understand the clocking requirements for the chip. The clocks team interacts with the floor-planning and back-end team to help craft the physical floorplan of the chip. The team explains the programming model to the SW team to come up with an efficient clock programming sequence. The team works with the silicon solution team to triage silicon or programming bugs in the lab.

Requirements

  • A Master’s degree in Electrical Engineering (or equivalent experience).
  • Practical experience with SystemVerilog and Universal Verification Method (UVM).
  • Experience with Design Verification, Logic Design, and Logic Synthesis.
  • Strong coding skills in Python, Perl, or other industry-standard scripting languages.

Nice To Haves

  • Understanding of general verification principles will be valuable to verify the clocks design.

Responsibilities

  • Collaborating with other architects, ASIC designers and verification engineers to verify high frequency clock structures.
  • Engaging with multiple teams and designing the GPU clock structure to satisfy all the architectural constraints.
  • Delivering clock information to SOC verification team, timing and DFT teams.
  • Using Perl to improve the productivity of the above teams.
  • Collaborating with Software and product group to debug GPU clock silicon bugs in new products.
  • Understanding and designing clocking structures to overcome sub-micron design challenges.
  • Identifying improvements in the current design and proposing and implementing new ways to improve the efficiency in the GPU clocking design.

Benefits

  • equity
  • benefits
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