About The Position

Our work at NVIDIA is dedicated towards a computing model focused on visual and AI computing. For two decades, NVIDIA has pioneered visual computing, the art and science of computer graphics, with our invention of the GPU. The GPU has also shown to be spectacularly effective at solving some of the most complex problems in computer science. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots and self-driving cars that can perceive and understand the world. We are looking to grow our company and teams with the smartest people in the world and there has never been a more exciting time to join our team! We are seeking a Verification Engineer - New College Graduate for our Memory Management Unit to verify the world’s leading GPUs.

Requirements

  • Pursuing or recently completed a BS or MS in Electrical Engineering, Computer Science, Computer Engineering or related field or equivalent experience
  • Exposure to Computer Architecture, ASIC design and verification methodology is required
  • Strong proficiency with SystemVerilog, C and/or C++, test planning, coverage closure, and creating reusable verification components.
  • Knowledgeable in constrained random testing with functional coverage and assertion-based verification.
  • Understanding of object oriented programming concepts.
  • Exposure to simulation tools like VCS, IES and debug tools like Debussy, GDB.
  • Good debugging and problem solving skills.

Nice To Haves

  • Understanding of memory subsystem micro-architecture, cache topologies and policies, memory management, interconnects, and/or arbiter designs is a huge plus.
  • Exposure to Universal Verification Methodology (UVM), SystemVerilog checkers and scoreboards.
  • Assertion-based verification, Semiformal Verification (SFV).
  • Perl or Python knowledge.

Responsibilities

  • Understand the design & implementation with focus on Memory Management unit.
  • Define the verification scope.
  • Develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors).
  • Implement test/coverage plans, and verify the correctness of the design.
  • Collaborate with architects, designers, software engineers across sites to accomplish your goals.
  • Plan and work on strategic direction of the methodology for the testbench with advance methodology.

Benefits

  • equity
  • benefits
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service