ASIC Chip Lead and Design Engineer (remote)
About The Position
This hands-on role designs and delivers complex custom ASICs from concept through silicon, working across the ASIC/SoC development flow. The engineer collaborates with architecture, verification, physical design, applications, and business teams to translate technical requirements into high-performance silicon while optimizing power, performance, and area (PPA). The role also evaluates customer requirements, develops technical approaches and effort estimates for new opportunities, and helps improve internal design methodologies and processes. Additional experience in radiation-hardened design, analog/mixed-signal circuits, EDA methodologies, or standard-cell library development may be applied and expanded. The position leads ASIC architecture and development, RTL design and synthesis, chip-level constraint development, RISC processor conformance, collaboration with physical design, and verification support. It also involves using modern revision-control tools and working in a collaborative, multi-site design community.
Requirements
- BSEE, MSEE, or equivalent.
- 10+ years of direct industry experience with ASIC and/or SoC design.
- Proficiency with Synopsys Design Compiler and other EDA tools.
- Strong understanding of digital design principles.
- Familiarity with RISC architectures such as ARM or MIPS.
- Strong background in RTL-based digital IC design using Verilog/SystemVerilog.
- Proven track record of first-pass successes.
- Excellent problem-solving skills and attention to detail.
- Ability to work well in a diverse team environment.
- Experience with industry-standard development tools and methodologies.
- Proficiency with UNIX/Linux, including shell scripting and text utilities such as sed, awk, and grep; using Modules; and C/C++, Perl, Python, and Tcl scripting.
- Proficiency with Windows applications, including Word, Excel, PowerPoint, Visio, Project, and PDF conversion.
Nice To Haves
- Experience in radiation-hardened design.
- Experience with analog/mixed-signal circuits.
- Experience with EDA methodologies.
- Experience with standard-cell library development.
Responsibilities
- Lead the architectural design of ASICs based on high-level requirements and block diagrams.
- Collaborate with system architects to define chip functionality, interfaces, and performance targets.
- Develop detailed specifications for chip components.
- Create RTL designs using Synopsys Design Compiler.
- Optimize RTL for area, power, and performance; implement and verify complex digital blocks.
- Develop timing constraints for the entire chip and work with physical design teams to support successful place-and-route.
- Constrain and verify RISC processors within the chip and optimize processor performance and power efficiency.
- Collaborate with physical design teams on floorplanning, placement, and routing, and address design-closure issues.
- Work with verification engineers to ensure functional correctness and assist with testbench creation and chip verification.
- Evaluate customer requirements and develop technical approaches and effort estimates for new opportunities.
- Influence improvements to internal design methodologies and processes.
- Use modern revision-control tools and best practices in a collaborative, multi-site design community.
- Mentor junior engineers and assume leadership roles as needed.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
