ASIC Chip Lead and Design Engineer (remote)
About The Position
Design and deliver complex custom ASICs from concept through silicon in a hands-on role spanning the full ASIC/SoC development flow. Work with architecture, verification, physical design, applications, and business teams to translate technical requirements into high-performance silicon while optimizing power, performance, and area (PPA). The role also includes evaluating customer requirements, developing technical approaches and effort estimates for new opportunities, and improving internal design methodologies and processes. Additional expertise in radiation-hardened design, analog/mixed-signal circuits, EDA methodologies, or standard-cell library development may be applied and developed. The engineer leads chip architecture and development, creates and optimizes RTL, develops chip timing constraints, constrains and verifies RISC processors, collaborates with physical design on implementation and closure, and supports verification activities. The position uses collaborative revision-control practices and a range of UNIX/Linux, programming, scripting, and Windows productivity tools.
Requirements
- BSEE, MSEE, or equivalent.
- At least 10 years of direct industry experience with ASIC and/or SoC design.
- Proficiency in Synopsys Design Compiler and other EDA tools.
- Strong understanding of digital design principles.
- Familiarity with RISC architectures such as ARM or MIPS.
- Strong background in RTL-based digital IC design using Verilog/SystemVerilog.
- Proven track record of first-pass successes.
- Proficiency with UNIX/Linux, including shell scripting and text utilities such as sed, awk, and grep, and use of Modules.
- Experience with C/C++ and PERL, Python, or TCL scripting.
- Proficiency with Windows applications including Word, Excel, PowerPoint, Visio, Project, and PDF conversion.
- Excellent problem-solving skills and attention to detail.
- Ability to take initiative and assume leadership roles.
- Ability to work well in a diverse team environment.
- Willingness to mentor junior engineers.
- Experience with industry-standard development tools and methodologies.
Nice To Haves
- Experience in radiation-hardened design.
- Experience with analog/mixed-signal circuits.
- Experience with EDA methodologies.
- Experience with standard-cell library development.
Responsibilities
- Lead ASIC architectural design based on high-level requirements and block diagrams.
- Collaborate with system architects to define chip functionality, interfaces, and performance targets.
- Develop detailed specifications for chip components.
- Create RTL designs using Synopsys Design Compiler and optimize RTL for area, power, and performance.
- Implement and verify complex digital blocks.
- Develop timing constraints for the entire chip.
- Work with physical design teams to support successful place-and-route.
- Constrain and verify RISC processors within the chip, and optimize processor performance and power efficiency.
- Collaborate with physical design teams on floorplanning, placement, and routing, and address design closure issues.
- Work with verification engineers to ensure functional correctness and assist with testbench creation and chip verification.
- Evaluate customer requirements and develop technical approaches and effort estimates for new opportunities.
- Help improve internal design methodologies and processes.
- Use modern revision-control tools and best practices in a collaborative, multi-site design community.
- Mentor junior engineers.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
