Teradyne's Semiconductor Test Division at our Agoura Hills, CA facility is looking for an intern to partner with our engineers and participate in the design of high-speed (> 1 Gbps) ICs or high-power, high-voltage ICs for ATE (Automatic Test Equipment) instruments. As part of this team, they will assist design engineers in developing specifications for analog blocks. You will be a key in assisting design engineers to optimize and characterize a circuit via simulation (with Cadence EDA tools) over all process and operating conditions. Additionally, the selected intern will take part in the Physical implementation (layout) of circuits, participate in documentation, plus be part of the design review as well as participate in IC evaluation in the lab. This is a summer intern on-site at our headquarters in Agoura Hills, CA.
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Career Level
Intern
Education Level
Associate degree