AI Driven Verification CAD Engineer

Sandisk•Milpitas, CA

2d•Hybrid

About The Position

As AI-assisted development matures, the bottleneck in ASIC verification is shifting from manual coding to architectural strategy. We are looking for an experienced engineer who prioritizes systemic ideas over routine implementation. This role is built for a self-directed engineer who can envision and build the infrastructure that allows a global team to move with at a higher velocity.

Requirements

B.S./M.S. in Electrical Engineering, Computer Engineering, or Computer Science.
7+ years of Design Verification experience with a deep understanding of chip-level functional model building.
Expert-level knowledge of SystemVerilog and UVM, including assertion-based (SVA) and coverage-driven (CDV) methodologies.
Advanced proficiency in Python and Shell scripting.
Comfortable using AI-assisted development tools to increase personal and team velocity.
Strong understanding of the differences between Behavioral and Structural models, with experience porting environments across simulation and emulation platforms.
Familiarity with Cadence ASIC verification tools (Xcelium, SimVision, vManager and Verissium)
Strong understanding of OOP concepts and how they apply to building scalable, maintainable verification libraries.
Expert-level Linux OS skills and experience managing large-scale regression farms (LSF, NC, Slurm).
Must be eligible to work in the US.

Nice To Haves

Experience with Perl is a plus.
Experience with formal verification paired with AI.

Responsibilities

Contribute to Sandisk verification architecture and the verification productivity suite by scaling AI into the global team using agents, skills and other advanced techniques.
Be responsible for the creative engineering required to make the global team more productive.
Identify inefficiencies then architect a framework to support AI-driven solutions.
Build a portable, scalable environment where AI tools and infrastructure handle the complexity.
Actively integrate AI code-development tools (LLMs, Copilots) into the ASIC workflow to accelerate design, verification and automated bug localization.
Deploy scalable & portable methodologies that function across different environments scaling from IP to SOC to enable "write once, run anywhere" capability.
Provide expert-level support for ASIC Design and Verification teams.
Provide the automation and workflows necessary for high-speed debug and data analysis.
Build robust Python-based frameworks for automated testbench generation, regression management, and intelligent failure triage.
Design, develop, and maintain AI forward CAD infrastructure for verification.
Enable seamless handoffs between IP & SOC verification teams.
Use advanced techniques like formal verification paired with AI to shift left verification development.
Document complex CAD flows for a global audience.
Train and help others understand and debug their usage of these workflows.

Benefits

paid vacation time
paid sick leave
medical/dental/vision insurance
life, accident and disability insurance
tax-advantaged flexible spending and health savings accounts
employee assistance program
other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity
tuition reimbursement
transit
the Applause Program
employee stock purchase plan
Sandisk's Savings 401(k) Plan
Short-Term Incentive (STI) Plan
annual Long-Term Incentive (LTI) program (restricted stock units (RSUs) or cash equivalents)
RSU awards for eligible new hires