Wireless Design Verification Engineer

Apple • Irvine, CA

3d

About The Position

Join Apple’s Wireless Connectivity team developing WiFi SoCs for Apple products. This role verifies radio digital controllers and Digital+RF subsystems, helping ensure successful silicon through sophisticated testbenches, comprehensive scenarios, and advanced verification methodologies. The work spans digital design and RF/mixed-signal-modeled systems, with responsibility for radio control and transceiver paths involving PLLs, DAC/ADC data paths, power management, and coexistence mechanisms.

The engineer leads subsystem-level verification from test planning through feature bring-up and closure, develops verification strategies for radio-modeled subsystems, and collaborates with Design, RF, PHY, Systems, and Integration teams. The role also includes mentoring team members and establishing verification best practices.

Requirements

• Bachelor of Science degree and a minimum of 10 years of relevant industry experience.
• Demonstrated expertise verifying complex digital ASICs, with a track record of successful silicon tapeouts.
• Deep knowledge of ASIC verification flows using SystemVerilog and UVM, including testbench architecture, verification planning, and coverage-driven methodologies.
• Experience developing verification environments from scratch and bringing up complex designs in simulation.
• Experience with constrained-random testing, functional coverage, and assertion-based verification.
• Experience verifying radio digital controllers, DSPs, PLL control systems, or wireless transceiver subsystems.
• Exposure to RF/analog system designs such as LNAs, mixers, PLLs, amplifiers, LDOs, and DACs/ADCs.
• Experience with digital and mixed-signal co-simulation using SystemVerilog analog behavioral models, DMS, or similar real-number-modeling approaches.
• Exposure to Python or similar scripting for automation, analysis, or infrastructure.
• Technical leadership through example, including driving verification strategies, establishing best practices, and delivering complex projects.
• Excellent communication skills and ability to influence cross-functional technical decisions.

Responsibilities

• Lead subsystem-level verification of radio digital controllers and data paths from test planning through feature bring-up and closure.
• Drive cross-functional collaboration to define verification requirements and debug issues spanning digital and RF/analog domains.
• Architect UVM testbench environments and infrastructure frameworks for radio control systems, PLL controllers, and data path subsystems.
• Develop constrained-random scenarios for complex radio protocols and multi-domain interactions.
• Lead digital and mixed-signal co-simulation efforts integrating SystemVerilog behavioral and DMS models.
• Mentor team members on radio verification approaches and establish best practices.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior