Wireless Chip Architect

Ceva • Mountain View, CA

1d

About The Position

In this role, you will be at the intersection of cutting-edge wireless technology and direct customer engagement. As a Wireless Architect, you drive the definition of connectivity subsystem architectures for next-generation products including Wi-Fi, Bluetooth, and UWB with mixed analog/digital hardware. You will also serve as a key technical partner for our customers, leading technical pre-sales, co-develop joint solution offerings, and bring a creative, flexible mindset to solving complex real-world connectivity challenges. This requires both architectural depth and strong product engineering experience, from concept through productization.

Requirements

• B.Sc. or M.Sc in Electrical Engineering
• Deep understanding of full-system SoC architecture, with emphasis on how connectivity subsystems interact with processors, memory controllers, power domains, and software stacks
• Product engineering experience: deep understanding of full lifecycle including post tape-out testing, silicon bring-up, productization, and production qualification.
• Experience in system definition for wireless communication systems
• Experience in wireless communication standards (such as WiFi/BT/Cellular/UWB)
• Experience in ASIC design and architecture, with proven experience in successful tape-outs and production
• Knowledge in performance and power modeling and analysis
• Deep understanding of VLSI development process and methods
• Technical leadership
• Strong communicator, able to translate complex architectural concepts for customers, executives, and engineering teams.
• Creative and flexible mindset: comfortable navigating ambiguous requirements and proposing pragmatic, innovative solutions
• Proven customer facing experience. Leading technical discussion, building trust, and influencing design decisions.

Nice To Haves

• Knowledge in RF integration and performance optimization
• Previous experience with 3rd party IP integration
• Knowledge in CPU/Processor architecture

Responsibilities

• Drive full-system view of how the connectivity subsystem interacts within an SoC, including CPU/processor, memory, and peripheral interfaces
• Definition of connectivity subsystem architecture specifications including : Feature-set definition and PPA (Power, Performance, Area) targets, Definition of system low power modes and PMU requirements, Definition of HW and SW interfaces of the connectivity sub-systems including: HW interfaces, state machines, operation sequences etc…, Analog and digital domains partitioning
• Customer facing and technical engagement: Lead technical discussions with customers, presenting connectivity architecture options and value propositions, Co-develop joint solution offerings with customers and partners, acting as technical advisor during system integration phases
• Support product lifecycle and productization: Support post-tape-out testing, production validation, and productization of wireless connectivity solutions, Lead or contribute to production-readiness activities including silicon characterization, yield analysis, and qualification testing
• Cross-functional leadership: Work closely with logic design, physical design, firmware, and validation teams to ensure successful implementation, Support wireless subsystem integration process from architectural definition through implementation, lab integration and test coverage planning, Collaborate with product management and business development stakeholders to translate customer feedback into architectural requirements and product roadmap inputs

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: Associate degree