Validation Engineer Intern

Renesas Electronics•San Jose, CA

22h•Onsite

About The Position

We are seeking a proactive Validation Engineer Intern to join our team for the Summer 2026 Internship, running from June 22 to August 14. This is a 100% onsite position, and we are only considering local talent. The internship is designed for individuals currently enrolled full-time in a university degree program pursuing a master's degree, who will not have graduated before September 2026.

Requirements

Pursuing a Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
Must not have graduated before September 2026
Strong understanding of digital and analog circuits, semiconductor devices, and computer architecture principles.
Familiarity with lab equipment and measurement techniques for silicon validation, including oscilloscopes, power supplies, BERT, AWGs, etc.
Proficiency in programming languages such as Python, C/C++, or scripting languages for test automation and data analysis.
Hands-On Experience with Python test automation equipment such programmable power supplies, multimeters, oscilloscopes, etc.
Excellent problem-solving skills with the ability to analyze complex technical issues and propose effective solutions.
Strong communication and teamwork skills, with the ability to collaborate effectively with cross-functional teams.
Eagerness to learn and adapt to new technologies and methodologies in the field of silicon validation.

Responsibilities

Assist in the development and execution of Bench Validation plans and conducting validations for new silicon products, including DDR, MCR, Memory Controllers or other integrated circuits.
Collaborate with cross-functional teams including Design, Test, and Marketing to understand product requirements and develop comprehensive validation strategies.
Utilize lab equipment such as Oscilloscopes, BERT, AWG, and other test instruments to perform electrical characterization and performance benchmarking.
Document test procedures, results, and findings in detailed engineering reports and contribute to the continuous improvement of validation methodologies.
Assist in debugging and troubleshooting silicon issues, working closely with design and Test Engineers to implement effective solutions.
Contributes to the development and enhancement of automated test frameworks and validation scripts to streamline the validation process and improve efficiency.