:Validation Engineer III

TekWissen • San Jose, CA

1d • Onsite

About The Position

The Validation Engineer III will join a highly technical team responsible for developing test plans, performing functional and electrical validation, and debugging issues for new processor silicon interface features, with a strong focus on power management. The engineer will develop and execute processor interface validation plans, contribute to platform design definition and review, and provide technical guidance and training to less experienced engineers and technicians.

Requirements

• Bachelor’s degree in Electrical Engineering or Computer Engineering with 5–7 years of related experience, or a master’s degree with at least 5 years of directly related experience.
• Experience and demonstrated technical expertise developing and executing platform-level electrical and functional test plans.
• Experience and demonstrated technical expertise debugging processor and PC platform I/O interfaces.
• Experience or knowledge using oscilloscopes, reading schematics and layout documentation, and using MS Windows and Office applications.
• Good written and oral communication skills.
• Ability to communicate with a variety of engineering disciplines and management.

Nice To Haves

• Advanced degree.
• Platform-level electrical characterization experience with processor I/O interfaces.

Responsibilities

• Write comprehensive electrical and functional test plans for processor interface validation.
• Execute electrical and functional test plans for client processors using hardware and software validation tools, oscilloscopes, and logic analyzers.
• Debug electrical and functional issues for new processors.
• Provide detailed input into platform definition and review platform designs used for silicon validation of new processors.
• Provide technical guidance and training to less experienced engineers and technicians in processor validation planning, testing, and debugging.

What This Job Offers

• Career Level: Mid Level