Technical Program Manager- IP/PDK
About The Position
The Common Hardware Group (CHG) is seeking a motivated technical leader to join the CAD/Methodology team. This role will own Infrastructure engagement and alignment, including the arrangement and QA for Vendor IPs, standard cells, and Process Design Kits (PDKs). The scope spans from early architecture through tape-out, post-silicon bring-up, and debug. Success requires both clarity and follow-through, alongside depth in flows and tools. The individual will serve as the primary key stakeholder bridging Cisco project leads and all supply chain dependencies, including IP/std cells vendors and external foundries. Responsibilities include managing schedules, aligning technical requirements, and ensuring delivery commitments for IP and PDK to land on time, qualified, and usable in Cisco projects.
Requirements
- 8+ years in physical design enablement, CAD, or equivalent, with prior experience with ASIC flows, physical design methodologies, and foundry processes.
- Prior experience in communication and program management.
- Prior experience with multi-party threads, writing summaries for executives and engineers, and keep pre-silicon and post-silicon stakeholders aligned.
- Prior experience with IP installation, PDK enablement, and technology file management.
Nice To Haves
- Scripting (e.g., Python, TCL) for automation; comfortable with process nodes and PDK structures in real programs.
- Hands-on experience with timing models.
- Familiarity with EDA tools (e.g., Synopsys, Cadence, Siemens) for physical design and verification.
Responsibilities
- Stakeholder leadership and communication — Partner routinely with Program/Project Management, Physical Design, Package / SI, RTL/Design, Design Verification, and CAD/Methodology. Translate priorities across disciplines, surface risks early, and drive decisions.
- External engagement and IP delivery — Work with foundries and IP vendors on roadmaps, releases, and bug fixes.
- Vendor IP and PDK lifecycle — Manage vendor deliverables end-to-end including integration, validation, qualification, versioning, and controlled distribution into the design environment.
- Help define and evolve the installation, QA, and release platform for IPs and PDKs.
- Collaborate with design teams on benchmarking vendors and technology options where trade-offs affect PPA, schedule, or flow risks, support informed choices for programs.
- Foundry collateral quality — Evaluate, integrate, and debug PDKs, technology files, and libraries for flow compatibility and design-rule readiness, feed issues back to vendors with clear technical context.
- Documentation enablement for IP/PDK usage, integration, and best practices.
Benefits
- medical, dental and vision insurance
- a 401(k) plan with a Cisco matching contribution
- paid parental leave
- short and long-term disability coverage
- basic life insurance
- 10 paid holidays per full calendar year
- 1 floating holiday for non-exempt employees
- 1 paid day off for employee’s birthday
- paid year-end holiday shutdown
- 4 paid days off for personal wellness
- 16 days of paid vacation time per full calendar year (non-exempt)
- flexible vacation time off program (exempt)
- 80 hours of sick time off provided on hire date and each January 1st thereafter
- up to 80 hours of unused sick time carried forward from one calendar year to the next
- Optional 10 paid days per full calendar year to volunteer
- annual bonuses (non-sales roles)
- performance-based incentive pay (sales roles)
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What This Job Offers
Job Type
Full-time
Career Level
Senior
Education Level
No Education Listed
