System Technology Research Engineer - (PhD Intern)

Intel•Hillsboro, OR

32d•Hybrid

About The Position

Intel's Foundry System Technology team is seeking a talented intern to help us push the boundaries of semiconductor and packaging manufacturing technologies. Our team is dedicated to advancing Moore's Law, exploring new product opportunities, and leading industry-defining packaging development through System Technology Co-optimisation (STCO). As a Research Engineer Intern, you will play a crucial role in developing STCO methodology and evaluating 3D/2.5D dis-aggregation schemes using solder microbumps or hybrid bonding for memory and logic stacking across different product architectures. This internship offers a unique opportunity to work on pioneering technologies and contribute to Intel's semiconductor processing and packaging roadmap.

Requirements

Active Ph.D. candidacy in one of the following areas of study: Electrical Engineering, Electronics Engineering, Computer Architecture and Design or similar.
1-2+ years research experience relevant to one or more of the following areas: System architecture modelling, digital circuit analysis and design, VLSI physical layout, electronic design automation, multi-physics modeling of electronic materials or systems.
Familiarity with IC design and physical layout tools such Cadence Virtuoso or Synopsis Fusion Compiler.

Nice To Haves

System architecture design and modelling
IC design, simulation, physical layout and tapeout experience.
Familiar with DRAM and SRAM circuit design and layout
Familiar with integrated circuits manufacturing flow and requirements
Familiar with different 2.5D and 3D packaging technologies
3DIC design and simulation experience
Good programming skills, preferably in Python.

Responsibilities

Develop and enhance STCO methodologies.
Perform system-level evaluations of novel devices, interconnects, patterning, materials, systems, and integration schemes.
Collaborate with diverse teams to drive innovation across various applications.