System Architect – Industrial Robotics and Healthcare

Advanced Micro Devices, Inc•Austin, TX

13d

About The Position

AMD is seeking a technically accomplished System Architect to own system architecture from initial concept through implementation for its Industrial, Robotics, and Healthcare business unit. The position reports to the Principal System Architect and defines practical, scalable architectures that customers and engineering teams can implement. It calls for technical judgment across AI workloads, heterogeneous compute, FPGA and adaptive SoC platforms, ARM and x86 processors, embedded software, real-time control, sensors, communication interfaces, and safety-critical system considerations. The successful candidate will work across AI, hardware, software, and system boundaries; simplify complex systems without compromising engineering accuracy; communicate architectural decisions, trade-offs, and recommendations clearly; challenge technical assumptions; identify architectural risks early; and use measurable engineering criteria to guide system-level decisions. The role is based in Austin, Texas; San Jose, California; Boxborough, Massachusetts; or another AMD office location within the United States, with collaboration across globally distributed teams and approximately 25% travel for onsite customer meetings and engagements.

Requirements

Demonstrated experience owning system architecture documents, specifications, and system-level technical requirements.
Strong understanding of heterogeneous compute architectures incorporating CPUs, GPUs, NPUs, FPGAs, embedded processors, MCUs, and dedicated accelerators.
Practical knowledge of FPGA and adaptive SoC architectures and modern programmable logic design methodologies.
Experience with embedded systems development using C/C++, Python, embedded Linux, device drivers, Yocto, Buildroot, or comparable environments.
Experience with robotics and real-time control systems, including motor control, torque control, impedance control, multi-rate control loops, sensor acquisition, and deterministic scheduling.
Knowledge of industrial and embedded interfaces such as EtherCAT, CAN-FD, CANopen, SPI, I²C, Ethernet, PCIe, MIPI, and USB.
Understanding of system safety and reliability concepts, including watchdogs, safe states, diagnostics, fault detection, and timeout handling.
Experience with AI and edge inference technologies.
Familiarity with AI deployment frameworks and runtimes such as ONNX, PyTorch, TensorFlow, or comparable technologies.
Knowledge and understanding of agentic AI concepts and architectures.
Experience making hardware, software, and AI workload-partitioning decisions.
Ability to define and analyze interface, timing, latency, bandwidth, and memory budgets.
Experience conducting architecture trade-off analyses across multiple implementation options.
Demonstrated ability to support engineering teams beyond the initial architecture and concept phases.
Ability to explain architectural decisions using measurable technical criteria.
Comfort working in a multicultural environment and collaborating with globally distributed engineering, business, and customer-facing teams.

Nice To Haves

Master’s degree or PhD in Electrical/Electronic Engineering, Computer Engineering, Computer Science, Robotics, or a related technical discipline preferred.
Equivalent professional experience may be considered for candidates demonstrating strong hands-on system architecture expertise.
Knowledge of applicable safety standards such as IEC 61508, ISO 26262, ISO 13849, and IEC 62304.

Responsibilities

Define end-to-end system architectures for AI-enabled embedded, robotics, industrial, and healthcare applications.
Partition workloads across CPUs, GPUs, NPUs, FPGA programmable logic, AI Engines, MCUs, and external accelerators.
Architect AI inference pipelines for vision, sensor processing, robotics, and edge intelligence applications.
Evaluate trade-offs involving latency, throughput, determinism, memory bandwidth, power, thermal constraints, functional safety, cost, and scalability.
Develop system architecture specifications, data-flow diagrams, interface definitions, timing budgets, memory and bandwidth requirements, and implementation guidance.
Partner with FPGA, software, firmware, AI, and system engineering teams to translate architecture concepts into executable designs.
Review technical proposals and challenge assumptions using engineering analysis and measurable data.
Support customer-facing technical discussions with clear, credible system architecture guidance.
Guide proof-of-concepts, benchmarks, reference designs, and technical demonstrators.
Identify system-level architectural risks early and recommend practical mitigation strategies.
Travel approximately 25% to support onsite customer meetings and engagements.