Staff Verification Design Engineer, DRAM

Micron TechnologyBoise, ID

About The Position

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We’re part of a global organization that brings together top engineers to design and verify Micron’s leading‑edge memory technologies. We thrive on solving complex circuit and system‑level challenges, and we work closely across regions to push what’s possible in memory design! In this role, you’ll play a key part in shaping verification strategies for Micron’s DRAM products. You’ll collaborate with teams across design, product engineering, test, process integration, and more to ensure our memory products deliver outstanding performance, quality, and reliability. Your work directly influences manufacturability, time‑to‑market, and customer success.

Requirements

  • Bachelor’s degree in Electrical Engineering or Computer Engineering
  • 5+ years of experience in verification or related design roles
  • Strong background in semiconductor circuit design, modeling, and verification
  • Strong understanding of DRAM/memory architecture and verification challenges
  • Proficiency with HSPICE and Python

Nice To Haves

  • Experience with DFT methodologies for memory products
  • Exposure to RTL verification, STA, or Timing Accurate Verilog
  • Experience with silicon validation, test chip bring‑up, or post‑silicon debug
  • Ability to mentor engineers and influence verification strategy across global teams
  • Extensive experience in circuit‑level verification using analog, SPICE and Verilog-design tools

Responsibilities

  • Contribute to the design and drive the verification of memory circuits from gate‑level to full chip implementations
  • Develop and execute verification plans for advanced DRAM builds
  • Lead circuit‑ and system‑level verification using industry‑standard tools and methodologies
  • Drive verification of memory arrays, control logic, address decode, data paths, and internal test logic
  • Analyze layout‑extracted parasitics and guide critical circuit reviews

Benefits

  • Choice of medical, dental and vision plans
  • Benefit programs that help protect your income if you are unable to work due to illness or injury
  • Paid family leave
  • Robust paid time-off program
  • Paid holidays
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