Staff FPGA Digital Engineer - 5

Northrop Grumman•Chandler, AZ
•$108,200 - $162,400•Onsite

About The Position

Northrop Grumman Space Systems is seeking a Staff FPGA Digital Engineer to support the Electro-Optics (EO) Group within the Launch Vehicles business unit in Chandler, Arizona. The engineer applies advanced FPGA engineering principles and methods to solve complex technical challenges, collaborating with senior and junior staff and cross-disciplinary hardware, algorithms, and software teams. The role suits someone who can work in a fast-paced collaborative environment and manage multiple assignments. The engineer leads resolution of design and integration challenges; develops test benches and verifies FPGA designs and bitstream builds; generates, verifies, and integrates I/O and image-processing HDL modules; maintains compliance with internal design standards; mentors less experienced engineers; and prepares design and verification documentation. The role also requires keeping current with FPGA technologies, tools, and methodologies. A U.S. Government DoD Secret clearance is required to start, and travel is 10%. Relocation assistance may be available.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related discipline from an accredited university and 12 years of relevant experience; or a master’s degree and 10 years of experience; or a Ph.D. and 8 years of experience.
  • Ability to obtain a U.S. Government Department of Defense (DoD) Secret security clearance at the time of application.
  • Advanced background in FPGA/SoC design and complex firmware development using VHDL or Verilog.
  • Extensive experience with AMD Xilinx FPGAs and SoCs, including design constraints for timing, power, and I/O, and static timing analysis.
  • Advanced proficiency in developing, verifying, and debugging MOSA interfaces and buses, including Ethernet, PCIe, AXI4, UART, and SDLC.
  • Mastery of simulation tools such as Questa/ModelSim and hardware debugging tools such as logic analyzers and oscilloscopes.
  • Strong experience creating and executing verification plans using simulation, analysis, and hardware bench testing.
  • Deep knowledge of OSVVM or UVM.

Nice To Haves

  • Master’s or Ph.D. in Electrical Engineering, Computer Engineering, or a related discipline.
  • Active U.S. Government DoD Secret security clearance at the time of application.
  • Experience with missile systems, seeker systems, or other high-reliability, environmentally challenging electro-optical applications.
  • Prior experience with DoD missile defense programs and associated standards.
  • Direct experience with AMD Xilinx Versal Gen 2 or Gen 1.
  • Mastery of both Vivado IDE and Vitis Unified IDE.
  • Advanced experience designing, integrating, and verifying DDR memory interfaces, such as DDR3, DDR4, or DDR5, with fabric-based controllers in FPGA designs.
  • Deep understanding of embedded C/C++ programming for integration with processors/SoCs.
  • Knowledge of high-speed PCB design and signal integrity.
  • Strong experience with OSVVM or UVM; OSVVM is preferred.

Responsibilities

  • Lead resolution of design and integration challenges using advanced technical knowledge across disciplines.
  • Develop and execute high-level test benches to verify FPGA functional correctness and timing requirements, and manage configuration of multiple FPGA bitstream builds.
  • Generate, verify, and integrate I/O and image-processing HDL modules, including function definitions, HDL coding, module-level simulation, and integration with device architecture.
  • Ensure compliance with internal design standards throughout the development lifecycle and mentor less experienced engineers.
  • Prepare, present, and maintain design documentation, including schematics, simulation results, and verification reports.
  • Stay current with evolving FPGA technologies, tools, and industry methodologies.

Benefits

  • Health insurance coverage
  • Life insurance
  • Disability insurance
  • Savings plan
  • Company-paid holidays
  • Paid time off (PTO) for vacation and/or personal business
  • Potential eligibility for overtime, shift differential, and discretionary bonus, depending on position
  • Potential eligibility for long-term incentives for employees in Vice President or Director positions
  • Relocation assistance may be available
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