Staff FPGA Design Engineer

Terran Orbital Corporation•Irvine, CA

8h•$150,000 - $190,000•Onsite

About The Position

Join a team where your impact reaches beyond the stars! At Terran Orbital, you’re not just part of the system – you’re a vital force propelling our mission forward. As trailblazers in satellite manufacturing and aerospace innovation, we shatter boundaries daily to deliver groundbreaking solutions that power our nation’s defense and commercial missions. We are a unique, fast growing, and trusted team dedicated to swiftly and efficiently designing, building, launching, and operating state of the art satellites for advanced mission constellations. If you’re driven by purpose, inspired by challenges, and ready to leave your mark on the universe, you’ll find a home and endless opportunities for growth here. Together, let’s redefine what is possible in orbit and beyond! Terran Orbital is seeking an experienced Staff FPGA Design Engineer to join our dynamic team. Reporting to the Embedded Software & FPGA Manager, the Staff FPGA Design Engineer will lead the architecture, development, verification, and flight-readiness of FPGA-based avionics subsystems. This role owns FPGA RTL design from concept through qualification, integration, and mission operations. The engineer collaborates across avionics, embedded software, systems, and hardware teams to deliver high-reliability, flight-critical digital logic.

Requirements

Bachelor’s degree in Electrical Engineering, Computer Engineering or equivalent.
8+ years of FPGA RTL architecture, development and verification.
Strong proficiency in SystemVerilog or VHDL.
Advanced verification methodologies and worst-case timing analysis.
Experienced designing with Microsemi Polarfire, AMD Zynq Versal, AMD Ultrascale.
Experienced with FPGA design tools including Vivado and Mentor Modelsim/Questasim.
Experienced with high-speed data buses and interfaces such as AXI, PCIe, DDR4/DDR5, JESD204B/C, or 100Gb ethernet and other common protocols such as SPI, I2C, UART, CAN FD, and LVDS.
Experience developing high speed NAND flash controllers including interface timing optimization, ECC integration, bad block management, DMA architecture and high throughput data path design.
Familiarity with version control systems such as Git based collaborative development environments.
Experienced with scripting languages such as Python, Tcl, and Bash.
Experienced developing software in Linux Environment with C/C++.
Experienced designing for space environment including radiation impacts and mitigations.
U.S. Citizenship with ability to obtain and maintain DoD security clearance.

Responsibilities

Own FPGA RTL development from architecture definition through verification, integration and flight readiness.
Define FPGA architecture and requirements in collaboration with systems, hardware and embedded software teams.
Develop RTL in SystemVerilog or VHDL for Microship Polarfire and AMD Zynq US+ and Versal.
Perform comprehensive verification, including simulation, test benches, timing closure, resource analysis and hardware validation.
Lead design reviews, ensure requirement traceability, and produce documentation for FPGA operation and integration.
Define and execute verification and validation testing (DVT) and support board bring-up.
Support system bring-up, integration, and troubleshooting during avionics and flight test activities.
Lead cross-functional technical discussions, drive architecture decisions and mentor more junior engineers.