Staff Engineer, Physical Design

Samsung•Austin, TX

8d•Onsite

About The Position

Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us! As a Senior or Staff Physical Design Engineer, you will support the physical implementation and methodology execution of high-performance GPU IP, contributing to power, performance, and area (PPA) goals across advanced process nodes. In this mid-level individual contributor role, you will help execute key stages of the physical design flow—from synthesis through floorplanning, timing closure, and signoff—while partnering closely with hardware and system-level teams. You bring curiosity and knowledge in hands-on implementation skills, debugging ability, and a collaborative mindset to help improve flows and deliver high-quality design outcomes. You help execute physical design implementation, assisting with floorplanning, placement, and routing of major GPU blocks to support system-level power, performance, and area (PPA) goals through synthesis-to-signoff flows. You support timing, power, and physical signoff activities, assisting with STA-driven optimization, DRC/LVS convergence, and reliability considerations across GPU blocks. You help advancing methodology and flow improvements, developing scripts and automation to enhance design productivity, debug tool issues, and improve repeatability across projects. You proactively seek collaboration with cross-functional teams and vendors, helping adapt physical design flows with hardware and system-level teams for cutting-edge nodes while supporting triage and resolution of implementation challenges. You take initiatives on moderate-to-complex projects, communicating openly, documenting analysis and results, demonstrating strong ownership and continuous learning mindset by staying ahead of emerging GPU technologies and physical design implementation.

Requirements

6+ years of experience with a Bachelor’s Degree in Computer Science, Computer Engineering, or related field, or 4+ years of experience with a Master’s Degree, or 2+ years of experience with a Ph.D.
2+ years of hands-on experience with physical design implementation flows, including synthesis, place-and-route, timing closure, and signoff support.
Proficiency with Synopsys or Cadence toolsets (e.g., ICC2/Fusion Compiler or Innovus, PrimeTime/Tempus, StarRC).
Strong scripting and automation skills in Python, TCL, Shell, or Perl.
Familiarity with low-power implementation considerations, physical verification tools (Calibre/ICV), and deep submicron design challenges.
Strong analytical and debugging skills, attention to details, and problem-solving ability using data-driven approach for complex flow or design issues.
Excellent collaboration and communication skills, with the ability to navigate ambiguity and maintain ownership in a fast-paced, global environment.

Responsibilities

Execute physical design implementation, assisting with floorplanning, placement, and routing of major GPU blocks to support system-level power, performance, and area (PPA) goals through synthesis-to-signoff flows.
Support timing, power, and physical signoff activities, assisting with STA-driven optimization, DRC/LVS convergence, and reliability considerations across GPU blocks.
Advance methodology and flow improvements, developing scripts and automation to enhance design productivity, debug tool issues, and improve repeatability across projects.
Proactively seek collaboration with cross-functional teams and vendors, helping adapt physical design flows with hardware and system-level teams for cutting-edge nodes while supporting triage and resolution of implementation challenges.
Take initiatives on moderate-to-complex projects, communicating openly, documenting analysis and results, demonstrating strong ownership and continuous learning mindset by staying ahead of emerging GPU technologies and physical design implementation.