Staff Engineer, IP Design (ASIC)

SK hynix memory solutions America Inc.•San Jose, CA

1d•Onsite

About The Position

You will join the System on Chip (SoC) Design Team at SK hynix memory solutions America, a group dedicated to delivering best-in-class controllers for high-performance SSDs. This team spans the full design cycle—from micro-architecture and RTL design to timing closure and tapeout readiness—enabling next-generation enterprise and AI data center storage solutions.

Requirements

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
6+ years of hands-on experience in ASIC/SoC design.
Proficiency in logic design and micro-architecture; RTL coding in Verilog and/or SystemVerilog language.
Experience with Lint, CDC, synthesis, power analysis and DV coverage tool.

Nice To Haves

Master’s or PhD in Electrical Engineering with working experiences.
NAND Flash, memory controller, datapath design, NVMe, PCIe, UCIe, DDR, CPU subsystem, Network Interconnect, AMBA, error correction code.
Proficiency in AI tool to generate synthesizable and functional RTL code.
Knowledge of design verification approaches to enhance verification coverage.

Responsibilities

RTL design (Verilog/SystemVerilog) for IP based on existing module or new specifications.
Collaborate, create clear documentation and communication with Design Verification, Silicon Validation, and Firmware teams to ensure design quality.