Staff Engineer, Hardware Enablement

Modular • United States / Canada,

2d • $180,000 - $270,000

About The Position

The Staff Hardware Enablement Engineer will bring up and optimize support for new accelerator platforms across Modular’s software stack, including Mojo kernels, compiler infrastructure, graph compiler, runtime, and MAX model serving. This cross-functional systems role involves learning how new accelerators execute computation, move data, synchronize work, and interact with vendor toolchains, then translating their capabilities into a performant and reliable experience within the stack. The engineer will collaborate with internal teams and external hardware partners, develop expertise in novel architectures, and contribute to Modular’s hardware portability efforts.

The role is open to candidates based in the US, Canada, and UK. Work may be performed from the Los Altos, CA or Edinburgh offices, or remotely from home. New-hire onboarding is conducted in person at the appropriate office. Travel for company onsites and local meetups is expected 2–4 times per year.

The estimated base salary range is $180,000–$270,000 USD in the US, $172,400–$258,600 CAD in Canada, and £99,600–£150,000 GBP in the UK. Compensation may depend on permissible job-related factors and may include an annual target bonus, equity, and benefits, as applicable.

Requirements

• At least 5 years of experience in high-performance computing, compiler engineering, accelerator software, systems engineering, or a closely related industry or research domain.
• Strong C++ skills and experience contributing to complex, multi-component software systems.
• Hands-on experience with at least one heterogeneous programming model such as CUDA, SYCL, OpenCL, or a comparable accelerator programming environment.
• Understanding of low-level AI operator implementation, demonstrated by writing or modifying GPU kernels, custom operators, accelerator code, or working with ML frameworks such as PyTorch at the C++/systems layer.
• Working knowledge of memory hierarchy, parallel execution, synchronization, data movement, and the relationship between software performance and hardware architecture.
• Experience debugging issues across software abstraction boundaries and systematically reasoning about correctness and performance.
• Ability and enthusiasm to learn unfamiliar hardware platforms, including reading architecture manuals, ISA documentation, and vendor technical materials.
• Strong communication and collaboration skills across compiler, runtime, kernel, and hardware teams.
• Pragmatic engineering approach that prioritizes correctness during initial bring-up and methodically iterates toward performance.
• Bachelor’s degree in Engineering, Information Systems, Computer Engineering, Electrical Engineering, Computer Science, or a related field and 4+ years of Software Engineering or related work experience; or a master’s degree in one of these fields and 3+ years of related experience; or a PhD in one of these fields and 2+ years of related experience.
• At least 2 years of work experience with a programming language such as Python, Mojo, Rust, or C++.

Nice To Haves

• Experience with non-GPU accelerator architectures such as DSPs, NPUs, AI ASICs, or other specialized compute hardware.
• Familiarity with MLIR or LLVM compiler infrastructure.
• Experience with GPU DSLs or libraries such as Triton, CUTLASS, or CuTe.
• Previous experience bringing up software support for a new accelerator or hardware platform.
• Experience working directly with hardware vendors or silicon engineering teams.
• Experience profiling and optimizing kernels or accelerator workloads using hardware-specific performance tools.
• Exposure to graph compilers and understanding how model operations are lowered, scheduled, fused, or mapped onto target hardware.
• Experience with model serving or inference optimization workflows.
• Familiarity with runtime concepts such as device management, memory allocation, queues, synchronization, or asynchronous execution.
• Experience working on portability layers targeting multiple hardware architectures.

Responsibilities

• Bring up and validate support for new hardware architectures across kernels, compiler infrastructure, runtime, graph execution, and model serving.
• Write, port, and optimize Mojo kernels for new accelerator architectures, establishing correctness before optimizing performance.
• Investigate performance and correctness issues across kernel execution, memory movement, compiler lowering, graph decisions, synchronization, and vendor runtime behavior.
• Develop an understanding of hardware platforms, including their ISA, execution model, memory hierarchy, synchronization mechanisms, compiler constraints, and vendor toolchains.
• Map AI operators and workloads, such as matrix multiplication, convolution, and reductions, onto new architectures.
• Contribute to portability infrastructure, compiler integration, tooling, testing, and debugging workflows for supporting additional hardware platforms.
• Collaborate with hardware vendor engineers to understand platform capabilities, investigate issues, build integration tests, and improve hardware/software integration.
• Benchmark and profile workloads, identify bottlenecks, and help mature new platforms from initial correctness to production-quality performance.
• Share knowledge about emerging architectures through technical documentation, demos, design discussions, and engineering write-ups.
• Participate in company events such as onsites and hackathons and contribute to the collaborative engineering culture.

Benefits

• Comprehensive healthcare coverage may be included, with package details varying by location.
• Retirement and savings programs may be included.
• Employee stock purchase opportunities may be included.
• Paid time off may be included.
• Wellbeing resources may be included.
• Family support programs may be included.
• Learning and development opportunities may be included.
• Competitive compensation packages may include RSU grants.
• Total compensation may include an annual target bonus and equity, as applicable.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior