Staff Digital Verification Engineer

Monolithic Power Systems, Inc. • San Jose, CA

2d • Onsite

About The Position

Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are passionate about sustainability, and are committed to providing leading-edge products and innovation to our customers. Our portfolio of technology helps power our world ---come join our team and see how YOU can make a difference.

The candidate must have demonstrated success in digital design & verification/infrastructure development for digital FPGAs/ASICs. Other key skills include technical/project leadership, documentation, RTL design knowledge, and backend flow and tools knowledge. Candidate will be expected to lead design, verification, and be technical focus on one or more devices and/or sections. Candidate will also be expected to support pre/post-silicon design validation and support Design/ATE/Application & Systems group.
MPS products include DDR devices, switching regulators, sensors, motor control, display drivers, audio amplifiers and power management ICs for fast-growing portable and non-portable markets such as broadband modems, notebooks, cell phones, telecom, fiber optics, digital camera, automobile and network equipment.

Requirements

• PhD/BS/MS in Electrical Engineering with emphasis in Digital Design/VLSI coursework.
• 5+ years’ experience in design plus verification of ASIC or FPGA
• Strong knowledge of ASIC development process and digital design techniques
• Proficient in standard DV languages (Verilog, System Verilog, UVM) and automated regression testcase development, and reporting/tracking coverage metrics.
• Experience with programming, scripting and automation languages (C/C++, shell, Perl, TCL, Python, etc.,).
• Solid knowledge and experience working through the entire Digital Design Flow: Specification definition, RTL Verification, Synthesis, P&R, Gate-Level Verification, Power Estimation, ATPG Generation and Simulation, AMS Sims, etc.
• Excellent Knowledge & Use of industry standard ASIC tools/flow for daily work: Digital Simulators, synthesis tools, DFT, LEC, STA, etc.
• Good written/verbal communication skills and strong teamwork/collaboration.

Nice To Haves

• Embedded designs and/or firmware development
• JEDEC, Automotive FuSA and ASIL Standards
• Knowledge of DDR, power management industry/applications
• I2C, I3C, SPI, USB, PMBUS
• GITLab

Responsibilities

• Development test plans, test benches and automated test cases
• Support Design Debug
• ASIC or FPGA from concept to implementation
• Knowledge and/or responsibility in synthesis, timing closure, and formal verification.
• Create scripting to support design and verification automation
• Estimate and manage time/tasks completion to target schedule

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: Ph.D. or professional degree