Staff Chemical Mechanical Planarization (CMP) Engineer

Intel Corporation•Hillsboro, OR

11d•$133,800 - $255,200•Hybrid

About The Position

Intel Foundry’s Manufacturing Development Customer Engineering (MDCE) organization accelerates technology ramp and manufacturing excellence by transitioning advanced technologies from development to high-volume production. The Staff Chemical Mechanical Planarization (CMP) Engineer provides module ownership and technical leadership across advanced logic technologies, including 18A, Intel 3, and Intel 12nm. The role leads CMP process development, cross-node standardization, and high-volume manufacturing readiness, delivering solutions for Intel products and foundry customers. The position requires in-person collaboration in a dynamic, fast-paced environment with competing priorities, while maintaining high standards for safety, quality, and customer satisfaction. It offers opportunities for professional growth, technical leadership, and contribution to Intel’s foundry objectives.

Requirements

Master’s degree in Chemical Engineering, Materials Science, Electrical Engineering, Mechanical Engineering, Physics, or a related technical field.
At least 5 years of experience in semiconductor manufacturing, process development, or technology development.
At least 3 years of direct CMP process development experience, including hands-on process tuning and characterization.
Experience with major CMP equipment platforms, such as AMAT or Ebara.
Experience with CMP consumables such as slurries, pads, conditioning disks, filters, and clean chemistries.
Previous semiconductor foundry experience.
Ability to work independently and effectively in fast-paced, high-pressure environments, including ambiguous situations.
Strong attention to detail and commitment to safety, quality, and compliance standards.
Demonstrated technical accomplishments and successful project delivery.

Nice To Haves

Doctorate in Chemical Engineering, Materials Science, Electrical Engineering, Mechanical Engineering, Physics, or a related technical field.
Experience with advanced technology nodes, such as sub-10nm logic, particularly Gate All Around (GAA) architectures, and a track record of successful technology development and high-volume manufacturing implementation.
Cross-functional leadership experience, including task force leadership for yield improvement initiatives.
Experience integrating CMP with other process modules, such as deposition, lithography, etch, and clean, and understanding CMP’s impact on device performance and yield.
Experience with CMP-relevant metrology and process control, including thickness, topography, defects, roughness, and particles.

Responsibilities

Lead CMP process development from concept through high-volume manufacturing implementation across multiple advanced technology nodes.
Drive standardization and best practices across Intel’s technology portfolio to maximize efficiency and yield.
Own and resolve complex CMP-related yield and manufacturing issues using data-driven approaches and structured problem-solving methodologies.
Align technical strategies with customer requirements and business objectives, ensuring on-time delivery of robust solutions.
Bridge technology development and manufacturing teams to support smooth transition of CMP processes to production.
Drive ongoing optimization to improve process capability, yield, and manufacturing efficiency.
Partner with Integration, Device, Yield, Factory, Quality, and Customer Engineering teams.
Collaborate with equipment and consumables suppliers to co-develop and optimize CMP solutions.
Mentor junior engineers and provide technical guidance across the organization.
Influence and drive results across multiple organizations and disciplines while communicating complex technical concepts to diverse audiences.