Sr Test Engineer

Qorvo • San Jose, CA

1d • $115,600 - $150,500

About The Position

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.

Requirements

• Strong experience with LabVIEW for custom measurement routines.
• Expertise in NI TestStand for sequencing, reporting, and production deployment.
• Proficiency in C# for instrument drivers, automation frameworks, and UI tools.
• Wafer‑level RF/DC testing experience, including probe‑station workflows, and tester calibration.
• Experience with motherboard/PCB design or layout, including RF routing and signal integrity.
• Ability to read and interpret schematics for test boards, probe cards, and driver circuits.
• Hands‑on debugging of test programs, hardware bring‑up, and instrument communication.
• Experience with probe card design, qualification, and maintenance.
• Typically 5+ years in semiconductor test engineering, RF test, MEMS test, or mixed‑signal ATE development.
• Experience supporting both R&D characterization and production test environments.
• Demonstrated ownership of test infrastructure or validation strategy.
• BS/MS/PhD in Electrical Engineering, Computer Science, or related field.

Responsibilities

• Build test infrastructure for wafer‑level and package‑level RF‑MEMS testing, including probe‑station setups, RF/DC benches, and automated test equipment.
• Develop and maintain automated test programs using LabVIEW, NI TestStand, and C#, ensuring scalability, repeatability, and production readiness.
• Lead validation strategy, defining test plans, characterization matrices, DOE structures, and qualification flows.
• Debug test programs, instrument communication, and hardware setups, resolving measurement anomalies and repeatability issues.
• Design, qualify, and maintain probe cards for wafer‑level RF‑MEMS testing.
• Support manufacturing ramp, transitioning test programs and hardware into production environments and improving throughput.
• Collaborate cross‑functionally with RF design, MEMS design, process engineering, reliability, and product engineering teams.

Benefits

• Competitive base salary commensurate with experience: $115,600 - $150,500, relevant for the California Bay Area (subject to change dependent on physical location)
• Total Rewards package

What This Job Offers

• Job Type: Full-time
• Career Level: Senior