Ayar Labs is hiring a Sr. / Staff. Engineer to join its Link Design and Architecture team in San Jose, California. The role owns the statistical work that connects photonic-device measurements to device and link models. Measurements come from wafer, package, and system levels, including Ayar Labs’ test floor and foundry and vendor partners. The engineer will turn those data into statistical descriptions of devices, prepare statistical inputs for compact models and link simulations, and monitor how full simulation models correlate with full-system measurements so discrepancies can be identified early. The Link Design and Architecture team supports optical-link robustness and performance through component-level modeling, architecture definition, link analysis, specification development, and yield prediction. It also explores next-generation link architectures that inform the company’s long-term roadmap. The position contributes to device specification-setting and ensures analyses are documented, traceable, reproducible, and reviewable.
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Job Type
Full-time
Career Level
Senior