About The Position

Ayar Labs is hiring a Sr. / Staff. Engineer to join its Link Design and Architecture team in San Jose, California. The role owns the statistical work that connects photonic-device measurements to device and link models. Measurements come from wafer, package, and system levels, including Ayar Labs’ test floor and foundry and vendor partners. The engineer will turn those data into statistical descriptions of devices, prepare statistical inputs for compact models and link simulations, and monitor how full simulation models correlate with full-system measurements so discrepancies can be identified early. The Link Design and Architecture team supports optical-link robustness and performance through component-level modeling, architecture definition, link analysis, specification development, and yield prediction. It also explores next-generation link architectures that inform the company’s long-term roadmap. The position contributes to device specification-setting and ensures analyses are documented, traceable, reproducible, and reviewable.

Requirements

  • MS or PhD in Electrical Engineering, Physics, Optics/Photonics, Statistics, or a related field.
  • At least 4 years of experience analyzing measurement data for semiconductor or photonic devices.
  • Strong applied statistics, including distribution fitting, variance decomposition, correlation and covariance estimation, regression, hypothesis testing, design of experiments, and Monte Carlo methods.
  • Strong Python skills for scientific computing and data analysis using NumPy, SciPy, pandas, statsmodels, or similar tools.
  • Comfort working with large tabular datasets.
  • Working knowledge of photonic device physics sufficient to interpret parameter shifts, including knowledge of modulators, photodetectors, grating couplers, and waveguides.
  • Excellent communication skills and a collaborative working style across device, modeling, and test teams.

Nice To Haves

  • Prior experience with silicon photonics or foundry process-control data (WAT/PCM, JMP).
  • Experience with statistical parameterization of compact models.
  • Experience validating measurement systems and test methods, including gauge R&R and distinguishing repeatability from device variation.
  • Experience with data pipelines and versioned datasets, including Git, SQL or Parquet, and dashboards.
  • Familiarity with Bayesian or hierarchical models for lot, wafer, and die structure.

Responsibilities

  • Work with the data infrastructure team to prepare internal wafer-, package-, and system-level test data, along with foundry and vendor deliveries, for analysis while maintaining traceable data lineage.
  • Develop statistical descriptions of photonic devices by fitting distributions, separating lot-to-lot, wafer-to-wafer, die-to-die, and within-die variance, estimating parameter correlations and covariance, and determining which statistical structure models should carry.
  • Work with photonic device engineers to select measured parameters that best characterize each device.
  • Work with link modeling engineers to express device statistics in formats used by compact and link models, including Monte Carlo and corner inputs and covariance-aware tolerancing.
  • Maintain correlation between full simulation models and full-system measurements across tapeouts and lots; track model-to-measurement residuals and raise discrepancies with a diagnosis of whether the model or test is at fault.
  • Contribute to device specification-setting methodology, including parametric yield estimates and specification limits derived from measured distributions.
  • Document methods, assumptions, and data lineage so results are reproducible and reviewable by engineering teams and executive stakeholders.
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