Sr. Principle Design Engineer

Cadence Systems • Austin, TX

1d • Onsite

About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This person will work with the existing functional verification environment to add new features into the verification environment, ensuring various customer configurations are clean as part of verification regressions, supporting customers in case of any issues with using the verification environment, and functional and code coverage. Additionally, this person will be responsible for ensuring that the design is in line with the technical and quality requirements set for the team – particularly with respect to our quality Metrics.

Requirements

• BS/MS - Electrical / Computer Engineering
• At least 10-12 years of relevant experience including design verification experience
• Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must
• UVM based functional verification environment development is required

Nice To Haves

• DDR, LPDDR, AXI and/or CHI-E experience is highly desirable
• Memory controller verification experience

Responsibilities

• Add new features into the verification environment
• Ensure various customer configurations are clean as part of verification regressions
• Support customers in case of any issues with using the verification environment
• Ensure functional and code coverage
• Ensure that the design is in line with the technical and quality requirements set for the team – particularly with respect to our quality Metrics

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: Associate degree