Sr Principal Test Engineer

Marvell TechnologyIrvine, CA
$162,000 - $239,760

About The Position

Marvell is looking for a highly motivated, talented Senior Principal Test Engineer to join its dynamic Test engineering team (Core Test Technology Group). This role will focus on the most advanced technologies including Custom ASIC, Network Switch, Server & Network Processors. The engineer will work closely with Product, Hardware, Design, System, and Firmware engineering teams to design, develop, and debug products and solutions. The position offers significant growth potential within the company.

Requirements

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 15-20 years of related professional experience. Master's degree in Computer Science, Electrical Engineering or related fields with 10-15 years of related experience.
  • Minimum 10+ years of test program development experience on the Advantest 93K ATE tester platform or Teradyne (Uflex or UflexPlus) ATE Tester Platform.
  • Demonstrable experience in ATE testing (critical skill), test methodology, silicon process, DFT/DFM, and high-speed digital testing experience required.
  • 10+ years experience and demonstrable experience with C/C++, JAVA, Perl, Python, and Linux environment.
  • Effective interpersonal, teamwork, and communication skills.
  • Excellent problem solving, teamwork, collaboration and interpersonal skills.
  • Has an inherent sense of urgency and accountability.
  • Must have the ability to multi-task in a fast-paced environment.

Responsibilities

  • Provide unique and optimized test solutions for Marvell Test Engineering and cross-functional groups.
  • Participate in product test program development on the Advantest 93K tester platform/Teradyne tester platform.
  • Design tester hardware for high-speed testing.
  • Develop characterization, production, and wafer sort test programs on the Advantest 93K tester.
  • Create documentation for detailed test plans and test methodologies to meet product specifications.
  • Involve in testability review with DFT/DFM teams to define and enhance yield and test methodologies.
  • Perform test pattern conversion from design simulation environment to ATE format.
  • Play a lead role in test flow optimization, test time reduction, insertion removals, yield improvement, and release of production test programs with product engineers.

Benefits

  • Employee stock purchase plan with a 2-year look back
  • Family support programs
  • Robust mental health resources
  • Recognition and service awards
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