Principal Test Engineer

Marvell Technology•Santa Clara, CA

1d•$136,880 - $205,000

About The Position

As a test development principal engineer in the Operations business group, you will test features on the silicon semiconductor chips Marvell produces for internal and external customers. You will make sure we don’t ship out any underperforming units. You’ll work closely with design to make sure their chip features are testable and that the results meet the customer’s specifications. You may even have to write new code or develop new testing strategies when our chips outpace the capabilities of current testing equipment. Lead Cutting-Edge ATE Test Solutions: As a Senior Level Test Engineer, you will spearhead the development of ATE test solutions for characterization, production, and wafer sort on Advantest 93K and/or Teradyne tester platforms. Your work will be at the forefront of technology, ensuring our products meet the highest standards. Innovate High-Speed Testing Hardware: Design and develop advanced ATE test hardware for high-speed testing, pushing the boundaries of what's possible and ensuring our products are ready for the future. Craft Comprehensive Test Plans: Create detailed test plans and methodologies documentation that meet stringent product specifications, ensuring every product we release is of the highest quality. Collaborate with Cross-Functional Teams: Participate in testability and test plan reviews with DFx and Design teams, working together to define and enhance yield and test methodologies. Your input will be crucial in driving innovation and efficiency. Transform Test Patterns: Convert test patterns from the design simulation environment to ATE format, bridging the gap between design and production. Optimize and Innovate: Play a lead role in optimizing test flows, reducing test times, removing unnecessary steps, improving yields, and releasing production test programs in collaboration with product engineers. Your contributions will directly impact the efficiency and success of our products. Opportunities for Growth: At Marvell, we believe in nurturing talent and providing opportunities for professional development. As you excel in your role, you will have the chance to take on more responsibilities, lead larger projects, and advance your career within the company. We are committed to supporting your growth and helping you achieve your career goals.

Requirements

Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10+ years of related professional experience. Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5+ years of experience.
Expertise in test program development on the Advantest 93K and/or Teradyne tester platform(s).
Demonstrable experience in ATE testing (critical skill), test methodology, silicon process, DFT/DFM, and high-speed digital testing.
Strong knowledge of C/C++, Perl, Python, and Linux environment.
Testing of high-speed interfaces (NRZ/PAM4)
Solid understanding of scan and MBIST DFT test methodologies.
Design of complex and high-performance ATE hardware.
Effective interpersonal, teamwork, communication, and problem-solving skills.
Highly motivated individual contributor with the ability to multi-task in a fast-paced environment.

Responsibilities

Spearhead the development of ATE test solutions for characterization, production, and wafer sort on Advantest 93K and/or Teradyne tester platforms.
Design and develop advanced ATE test hardware for high-speed testing.
Create detailed test plans and methodologies documentation that meet stringent product specifications.
Participate in testability and test plan reviews with DFx and Design teams.
Convert test patterns from the design simulation environment to ATE format.
Optimize test flows, reduce test times, remove unnecessary steps, improve yields, and release production test programs in collaboration with product engineers.