Sr. Principal Product Engineer

Cadence Systems•San Jose, CA

1d•Hybrid

About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This role involves researching, designing, developing, and testing electronic components and systems for Electronic Design Automation (EDA) and semiconductor intellectual property (IP), employing knowledge of electronic theory and materials properties. The individual will act as a solutions expert responsible for driving the deployment of Cerebrus AI studio and Cerebrus products, leading project teams of product engineers and internal development partners. Responsibilities include delivering training sessions, reviewing customer specifications to provide feedback and solutions, developing organization-wide flow and methodologies for Cerebrus products, and analyzing customer accounts to engage the right people to solve their use cases and needs. Some telecommuting is permitted, and availability to work on projects at various, unanticipated sites throughout the United States and internationally is required.

Requirements

Bachelor’s degree in Electronic Engineering, Electrical Engineering or related field.
Minimum eight (8) years of progressive, post-baccalaureate experience in the job offered or in a related engineering occupation.
RTL-to-GDSII implementation designs using industry standard tools including Cadence Innovus and Synopsys IC Compiler Sign-off ECO flows for timing and IR drop, and sign-off physical verification flows, including DRC and LVS closure using industry sign-off tools
Development and deployment of flow methodologies for custom clock tree implementation for Central Processing Unit (CPU) subsystems
CPU and Graphics Processing Unit (GPU) class design closure, and resolving timing, power, and congestion challenges
EDA flow automation with TCL and Python, including scripting, data extraction, log parsing, and custom utilities
Development of Machine Learning (ML) and Artificial Intelligence (AI) based flow and design improvements for digital design implementations
Advanced node/technology placement/routing optimization for high complexity CPU/GPU designs
Hierarchical floor planning and SoC assembly, including interface planning, feedthroughs, and tiling
Must be available to work on projects at various, unanticipated sites throughout the United States and internationally.

Responsibilities

Research, design, develop, and test electronic components and systems for Electronic Design Automation (EDA) and semiconductor intellectual property (IP) employing knowledge of electronic theory and materials properties.
Act as solutions expert responsible for driving the deployment of Cerebrus AI studio and Cerebrus products.
Lead project teams of product engineers and internal development partners responsible for Cadence Cerebrus product.
Deliver training sessions for field organization, customer training events, cross functional learning events.
Review customer specifications and requirements and provide feedback or solutions for product quality and mitigate risk of product failure.
Develop organization-wide flow and methodologies for Cerebrus product.
Analyze the customer accounts and engage the right people to solve the customers’ use cases and customer needs.