Sr Memory Subsystem Verification Engineer
About The Position
Join AMD’s Adaptive and Embedded Computing Group (AECG) and help shape the future of high-performance computing. We are seeking an experienced Silicon Design Verification Engineer to play a pivotal role in delivering next-generation silicon by driving pre-silicon verification for advanced Network-on-Chip (NoC) architectures and cutting-edge DRAM memory controller IPs (LPDDR6, HBM4). In this role, you won’t just verify designs—you’ll influence architecture, elevate quality, and help ensure first-pass silicon success on some of the industry’s most advanced technologies. You’ll work across IP and SoC levels, leveraging state-of-the-art simulation and formal verification techniques in a highly collaborative, innovation-driven environment.
Requirements
- BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field
- Strong expertise in SystemVerilog and UVM, with hands-on experience in simulation tools such as Synopsys VCS or Cadence Xcelium
- Deep understanding of modern verification methodologies, including assertion-based and coverage-driven verification
Nice To Haves
- Demonstrated success driving verification strategy and execution for NoC and/or memory controller IPs
- Experience shaping verification architecture, tools, and infrastructure for complex, high-performance silicon designs is highly valued
- Familiarity with regression and verification management tools, including database-driven workflows
- Exposure to formal verification tools such as VC Formal, JasperGold, or Questa Formal is a plus
- Experience with gate-level simulation, power-aware verification, or silicon debug (tester/board level) is a plus
Responsibilities
- Drive verification of advanced NoC architectures and next-generation DRAM memory controllers (LPDDR6, DDR5, HBM4), ensuring best-in-class quality and performance
- Architect, develop, and optimize simulation and formal-based verification environments at both IP and SoC levels
- Own the full verification lifecycle: planning, execution, tracking, closure, and delivery
- Create and execute robust verification plans, including sophisticated testbenches and coverage-driven test strategies
- Partner cross-functionally with design, architecture, and software teams to define and implement scalable verification methodologies
- Apply advanced techniques including UVM, assertion-based verification, and formal methods
- Mentor and guide junior engineers, fostering a culture of technical excellence and continuous innovation
Benefits
- AMD benefits at a glance
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What This Job Offers
Job Type
Full-time
Career Level
Senior
