Sr. Memory Layout Engineer (7676)

TSMC • Ottawa, ON

4d • Onsite

About The Position

In the role of Senior Memory Layout Engineer, you will primarily be responsible for challenging and cutting-edge custom layout design and be involved in R&D projects implemented on the world’s most advanced CMOS/FinFET processes (5nm and below). This will involve detailed implementation of the high speed and high-density memory compilers and high-speed analog circuits. The successful candidate must demonstrate a high level of ability to estimate, plan and coordinate layout work.
You will perform advanced custom layout implementing IC design in deep-submicron CMOS/FinFET. In addition, you will accomplish compact high performance memory layout: Memory Array, Periphery and Tiler Coding, etc. using industry standard custom CAD tools, layout, DRC, LVS, RC Extraction etc.

Requirements

• Bachelor’s or master’s degree in Computer Science, Computer Engineering, Physics, Mathematics, or a related discipline
• 8+ years of experience in advanced Semiconductor Memory Layout design
• Advanced FinFET nodes, TSMC 16 nanometer and below
• OTP or other types of memory layout design
• Layout techniques to meet ESD, latch up, antenna requirements
• Verification tools: ICV, Calibre
• Design tool(s): Custom Compiler, Cadence Virtuoso or equivalent
• Scripting language: TCL, etc.
• Talent in advanced layout design, verification, and documentation of memory circuits
• Hands-on working knowledge of CAD tools; expert user of at least one large CAD custom layout tool flow
• Demonstrated knowledge writing scripts (Cadence Skill, Pearl, Compiler-Tiler, Linux)
• Ability to deliver expert/ high quality layouts creatively and independently
• Exceptional time management skills and work habits, with experience working under pressure to deliver
• Proven ability to learn and adapt to new processes and design styles or constraints
• A seasoned team player with enhanced communication skills; excellent working knowledge of English (written and oral) is mandatory
• Ability to work well with teams in diverse locations (e.g., USA, Taiwan)
• Advanced ability to analyze and problem-solve
• Well established listening, understanding, and responding skills, and ability to appreciate and interact with cross-functional teams
• Highly developed attention to detail and multi-tasking skills

Nice To Haves

• Demonstrated team leadership is a strong asset

Responsibilities

• Challenging and cutting-edge custom layout design
• Involved in R&D projects implemented on the world’s most advanced CMOS/FinFET processes (5nm and below)
• Detailed implementation of high speed and high-density memory compilers and high-speed analog circuits
• Estimate, plan and coordinate layout work
• Perform advanced custom layout implementing IC design in deep-submicron CMOS/FinFET
• Accomplish compact high performance memory layout: Memory Array, Periphery and Tiler Coding, etc. using industry standard custom CAD tools, layout, DRC, LVS, RC Extraction etc.

Benefits

• Equal Employment Opportunities for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, genetic information, or any other characteristic protected by the Employment Equity Act and other application legislation in Canada.
• Reasonable accommodation due to a disability during the application or the recruiting process.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior