Sr Engineer, TSE-DRAM

Micron•Boise, ID

About The Position

Micron Technology is seeking a Sr Engineer, TSE-DRAM to develop, debug, and maintain code that enables parallel testing of advanced memory devices. The role supports R&D and collaborates with global teams, including designing and debugging test hardware. It develops and optimizes production test flows and test algorithms for DRAM, covering test software and hardware requirements, defect coverage, characterization, trending, process flow, and test times. The engineer develops product test programs primarily in C++ and Python on Automated Test Equipment (ATE), then releases them to manufacturing. The role improves test efficiency, reduces product test time and manufacturing costs, automates processes, and develops tools for analyzing large volumes of probe data. It also advances Design for Test (DFT), Design for Manufacturability (DFM), and Design for Reliability (DFR) capabilities. The position independently investigates test issues, identifies root causes, and provides solutions across internal and external groups. It performs statistical analysis to support validation and release decisions, and works with global teams to verify yield and quality against data-sheet specifications. The engineer supports experiments to improve yield or capacity, helps develop new processes and capabilities for the product roadmap, and may lead development teams. The role also communicates with customers and stakeholders, shares technical information with varied audiences, and serves as a liaison and coach. The employer accepts a bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, Mechanical Engineering, or a related field, plus four years of experience in the job offered or a related occupation.

Requirements

  • Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, Mechanical Engineering, or a related field.
  • Four years of experience in the job offered or in a related occupation.
  • Knowledge of digital logic gates, CMOS transistor operation, and DRAM memory device physics as they relate to test and reliability.
  • Programming skills for developing and debugging test algorithms, including C++.
  • Experience with Unix/Linux development environments and command-line tools for test program development.
  • Python or Perl scripting skills for automated test development and data extraction.
  • Knowledge of data analysis, Statistical Process Control (SPC), and statistical modeling to derive actionable insights from large, complex datasets.
  • Knowledge of CMOS manufacturing.
  • Experience with semiconductor memory testers (ATE platforms) and algorithm pattern generation (APG).

Responsibilities

  • Develop, debug, and maintain code that enables parallel testing of advanced memory devices.
  • Support R&D and collaborate with global teams, including designing and debugging test hardware.
  • Develop efficient production test flows through test algorithm optimization.
  • Design DRAM test plans and test algorithms covering software and hardware requirements, defect coverage, characterization, trending, process flow, and test times.
  • Develop product test programs, primarily using C++ and Python, on ATE and release them to manufacturing.
  • Optimize test programs to reduce product test times and manufacturing costs.
  • Automate test processes by writing software and develop tools for analysis of probe data.
  • Develop DFT, DFM, and DFR capabilities.
  • Independently debug test issues, determine root causes, and provide solutions across internal and external groups.
  • Perform statistical data analysis and provide justification for program validation and release to ensure program quality and data integrity.
  • Evaluate and verify yields and quality with global teams against data-sheet specifications.
  • Support experiments intended to improve yield or capacity by resolving test issues affecting site operations in a timely manner.
  • Support multi-team and multi-site development of processes and capabilities for the product roadmap, and lead development where necessary.
  • Communicate with internal and external customers to develop and qualify test solutions in a timely manner.
  • Leverage existing resources, serve as a liaison and coach, and share or present technical information to varied audiences.

Benefits

  • Choice of medical, dental, and vision plans.
  • Programs that help protect income in the event of illness or injury.
  • Paid family leave.
  • Paid time-off program.
  • Paid holidays.
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