Sr. Director Hardware Development

Advanced Micro Devices, Inc•Santa Clara, CA

6d•Hybrid

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. This is an exciting opportunity for an experienced Senior Director of Hardware Development to lead next-generation scale-up switch system design within AMD’s Networking Technology Solutions Group (NTSG). This leader will drive end-to-end hardware architecture, development, and deployment for high-performance AI networking platforms, with responsibility for delivering complex, high-speed systems that support AMD’s AI infrastructure roadmap.

Requirements

Bachelor’s degree in electrical engineering, Computer Engineering, or a related field required.
The ideal candidate is a seasoned engineering leader with a proven track record of delivering complex, high-speed hardware systems from concept through production.
This individual brings deep technical judgment, strong execution discipline, and the ability to lead multidisciplinary teams across electrical, SI/PI, mechanical, and thermal engineering.
They will shape technical strategy, scale team capabilities, and partner effectively across global engineering, manufacturing, customer, and executive stakeholder groups.

Nice To Haves

Extensive experience leading high-performance networking systems, scale-up switch platforms, or AI system architectures.
Deep expertise in PCIe Gen6/Gen7, UAL/XGMI, DDR5/DDR6, 200G+ Ethernet, and high-speed interconnect technologies.
Strong background in system-level SI/PI design, validation, debug, and root-cause analysis.
Hands-on experience with complex board and system bring-up, PCB design, high-speed layout, and system integration.
Experience with hardware development tools such as Cadence, Altium, simulation environments, and scripting.
Proven success leading cross-functional and globally distributed engineering teams.
Experience with FPGA, CPLD, or ASIC integration is preferred.
Background in optical interconnects and scale-out/scale-up system architecture is preferred.
Familiarity with configuration management tools such as Git or SVN is preferred.
Master’s degree or higher preferred.

Responsibilities

Define and drive system architecture for scale-up switch platforms, including 800G/1.6T+ class systems.
Establish the hardware roadmap, design strategy, and technical direction aligned with AMD’s AI infrastructure goals.
Serve as the senior technical authority across board, system, and interconnect design.
Lead end-to-end hardware development, including architecture, schematic design, PCB layout, bring-up, validation, and production readiness.
Drive high-speed interconnect design across PCIe Gen6/Gen7, UAL/XGMI, 200G+ Ethernet, and related technologies with strong SI/PI rigor.
Oversee system-level validation, electrical bring-up, compliance, debug, root-cause analysis, and corrective actions for switch and NIC platforms.
Build, mentor, and lead high-performing global teams across electrical, SI/PI, mechanical, and thermal engineering disciplines.
Manage headcount planning, capability development, vendor partnerships, and global development execution.
Partner closely with ASIC, packaging, optics, platform architecture, system software, manufacturing, quality, field, product management, customer, and hyperscale teams.
Communicate technical direction, risks, trade-offs, and execution status to executive leadership.
Drive cost optimization, second-source strategy, design-for-manufacturability improvements, and innovation in validation methodology and AI-enabled engineering workflows.