About The Position
Analysts create must-have insights for our clients through published research and client interaction. You will meet with clients every day: on the phone, in a video conference, from the stage at a Gartner event, or face-to-face during a sales support visit. In every interaction, you will help clients overcome their challenges and perform better. As part of Gartner’s Emerging Market Dynamics Group, you will equip leaders in the product management, product development, and product marketing roles– from the market or competitive intelligence experts to the CMO, CSO, CTO and the CEO – in the global semiconductor, IT and electronic equipment industry with indispensable insights, advice, and tools to achieve their mission-critical priorities and build the successful organizations of tomorrow.
Requirements
- 12-18+ years in foundry / fabless supply planning / OSAT / advanced packaging / substrate ecosystem / semi strategy.
- Deep understanding of foundry operations (TSMC/Samsung/Intel), node transitions, yield, and fab economics.
- Ability to convert technical signals into market-impact insights.
- Deep expertise in OSAT / advanced packaging (CoWoS, 2.5D/3D).
- Experience with capacity planning, node transitions, or fab economics.
- Understanding of substrates, materials, and test flows.
- Strong grasp of yield, utilization, and ramp curves.
- Ability to translate technical capacity into market-level supply insights.
- Experience with yield, throughput, and assembly economics.
Nice To Haves
- Exposure to advanced packaging interface, HBM integration, chiplet, foundry-packaging coordination.
- Experience interacting with hyperscaler or large fabless customers.
- Financial modeling or investor-facing experience.
Responsibilities
- Own the global semiconductor foundry capacity, allocation, and economics narrative for AI infrastructure, translating wafer capacity, node transitions, and capex into deployable compute supply and timing for hyperscalers, OEMs, and investors.
- Own advanced packaging, substrates, OSAT, and test economics as the primary chokepoint determining AI accelerator throughput and deployment timing.
- Build POV on AI-driven foundry capacity formation (node mix, utilization, yield ramp).
- Build POV on CoWoS, advanced packaging, and substrate constraints.
- Translate wafer starts → effective AI compute availability.
- Translate packaging capacity into actual accelerator output.
- Analyze allocation dynamics across AI vs non-AI demand.
- Analyze yield, advanced packaging throughput (CoWoS, 2.5D/3D), and test bottlenecks.
- Model substrate, materials, and test constraints.
- Lead research on capex credibility, expansion timelines, and utilization risk.
- Lead research on packaging allocation, substrate shortages, test constraints.
- Translate packaging into accelerator output reality.
- Partner with memory, power and other semiconductor analysts to build end-to-end supply view.
- Contribute to: AI Compute Capacity Model, Bottleneck Tracker, and AI Silicon Cost Stack model.
Benefits
- World-class benefits
- Highly competitive compensation
- Disproportionate rewards for top performers
- Generous PTO
- 401k match up to $7,200 per year
- Opportunity to purchase company stock at a discount
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What This Job Offers
Job Type
Full-time
Career Level
Senior
Education Level
No Education Listed
