Sr Application Engineer

Cadence Design SystemsSan Jose, CA
$84,000 - $156,000

About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Requirements

  • Master’s degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
  • Academic coursework or internship experience in VLSI design, physical design, or signoff flows, including exposure to parasitic extraction, EMIR, timing, or physical verification concepts.
  • Basic understanding of IC layout, netlists, LVS, and signoff methodologies.
  • Familiarity with Linux/UNIX environments and EDA tool workflows.
  • Strong analytical and problem‑solving skills, with the ability to debug technical issues with guidance.
  • Good written and verbal communication skills, with interest in customer‑facing technical roles.
  • Ability to work effectively in a team‑oriented, fast‑paced environment and collaborate with sales, R&D, and field teams.

Nice To Haves

  • Exposure to Cadence tools such as Quantus™, Voltus‑Fi™, Virtuoso®, Pegasus™, or Spectre® through coursework, academic projects, or internships.
  • Coursework or project experience related to advanced semiconductor technologies, power integrity, signal integrity, or physical verification.
  • Internship or hands‑on project experience involving EDA tools, semiconductor design flows, or foundry PDKs.
  • Basic scripting knowledge in Tcl, Python, or shell scripting for flow automation or data analysis.
  • Strong interest in technical customer engagement, including demos, evaluations, and product enablement

Responsibilities

  • Drive customer adoption of Cadence Quantus™ signoff parasitic extraction and Voltus‑Fi™ EMIR solutions through guided pre‑sales and post‑sales technical engagements.
  • Support and execute customer benchmarks and evaluations to demonstrate product accuracy, performance, and value under supervision.
  • Develop and deliver technical demonstrations, product presentations, and proof‑of‑concepts, with mentoring from senior team members.
  • Collaborate with sales management, account teams, and customers to understand technical requirements and support business opportunities.
  • Contribute to technical sales execution plans, while communicating progress and learnings to peers and field technical management.
  • Provide pre‑sales technical support during customer meetings, evaluations, and presentations to help drive successful design wins.

Benefits

  • paid vacation and paid holidays
  • 401(k) plan with employer match
  • employee stock purchase plan
  • a variety of medical, dental and vision plan options
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