Software Engineer
About The Position
The Advanced Radar Research Center (ARRC) is seeking experienced technical software engineers. This position serves as a Software Engineer on the FPGA team. This team is responsible for the development of FPGA firmware to enable reliable production, conditioning, reduction, and transfer of radar data based on user-defined scan parameters. A qualified candidate should have a Bachelor's in an engineering discipline and at least 36 months of software development and optimization experience. This position will be expected to translate complex algorithms and operations into scalable digital designs and implement with high-quality HDL (Verilog, SystemVerilog). Ability to optimize designs to meet constraints by managing trade-offs between throughput, latency, and FPGA resources. Design and develop testbenches that thoroughly test HDL modules to ensure correctness and robustness to ensure data will reliably flow through a complex network of FPGA devices. Carry out timing analysis on designs and create constraints or implement pipelining to ensure compiled bitstreams reliably meet timing. May lead a functional team. Performs various duties as needed to successfully fulfill the functions of the position. This position requires the ability to obtain and maintain federal security clearance.
Requirements
- Bachelor's degree.
- 36 months of embedded software experience.
- Will accept 48 months of related experience in lieu of the Bachelor's degree for a total of 84 months of related experience.
Nice To Haves
- May lead a functional team.
Responsibilities
- Translate complex algorithms and operations into scalable digital designs and implement with high-quality HDL (Verilog, SystemVerilog).
- Ability to optimize designs to meet constraints by managing trade-offs between throughput, latency, and FPGA resources.
- Design and develop testbenches that thoroughly test HDL modules to ensure correctness and robustness to ensure data will reliably flow through a complex network of FPGA devices.
- Carry out timing analysis on designs and create constraints or implement pipelining to ensure compiled bitstreams reliably meet timing.
- May lead a functional team.
- Performs various duties as needed to successfully fulfill the functions of the position.
- This position requires the ability to obtain and maintain federal security clearance.
Benefits
- Benefits Eligible: Yes
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
