SoC Platform Architect - RISC-V

Qualcomm•San Diego, CA

6d•$174,400 - $261,600

About The Position

Qualcomm’s SoC Platform Architecture team defines platform architectures & solutions enabling the next-generation of system-on-chip (SoC) products across Qualcomm’s business lines including compute, automotive, mobile, wearables, XR and IoT with focus in utilizing RISC-V architecture. Our team performs analysis, defines, and delivers innovative and scalable architectures across key technologies including heterogenous compute, memory systems, interconnects, multimedia, AI/ML, multi-die, power-management and more. We collaborate directly with software, systems, design, product marketing, and customers. We are currently seeking SoC Architect with proven expertise in defining and delivering RISC-V Application Processor SoCs, including key platform technologies such as AIA, IOMMU, CBQRI, debug & security architecture etc to join us in our mission to innovate and deliver the most advanced and scalable SoC platform architectures in the industry.

Requirements

Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Experienced in RISC-V AP platform architecture particularly in the area of AIA, CBQRI, IOMMU, debug security, etc.
Excellent communication, documentation, and interpersonal skills with ability to convey proposals and interact effectively across a distributed multi-discipline organization
Strong foundation of silicon design principles and architectural trade-offs
Ability to span and connect levels of abstraction across system-design, high-level languages, OS, HW/SW interface, micro-architecture, and silicon implementation
Background in architecture (IP or SoC), and/or front-end design/verification (micro-architecture)
Demonstrated deep technical knowledge and achievements at the SoC, sub-system or large IP levels as micro-architect or architect
Ability to apply appropriate abstractions and quantitative analysis for problem definition and solutions
Experience in using, improving, and developing a variety of tools for analysis and modeling, such as functional and performance simulators, profilers, etc.
Programming ability for modeling and automation (OOP C++, Python preferred) with experience in software development best practices including reviews, unit-testing, version control, etc.
Ability and desire to develop and improve architecture methodologies for experiments and analysis
Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.
Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience.
PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

Nice To Haves

Preferred with experience in the SoC areas such as boot, timebase management and network, security architecture, reset architecture and debug architecture, system level control/management with components such as BMC, ECU, etc.
Bachelor’s degree in Electronic Engineering, Computer Science or related field required; Master’s degree or PhD highly desired
5+ years of SoC/IP architecture or micro-architecture/front-end-design
Candidates with primarily a micro-architecture/design background must have contributions that demonstrate higher-level analysis and design
SoC architectures including heterogeneous compute, NoC/interconnect, memory-systems, multicore, multi-die, cache hierarchies, shared memory, I/O, coherency, compression, security
Resource and Power Management
Security Architecture
System-level debug
Safety, reliability, and high-resilience/high-availability systems
AI & Machine Learning
Control and Real-time systems
High-level Operating Systems (e.g., Android, Linux, Windows)
Real-time operating systems (e.g., Zephyr, FreeRTOS)
Front-end Digital Hardware Design or Verification
Arm system architectures (e.g., Cortex-A, Cortex-R, Cortex-M, CoreSight)
High-speed I/O (USB, PCIe, CXL)
External memory and storage architectures (e.g., LPDDR, NAND Flash, NOR Flash)
Networking & Connectivity (e.g., Ethernet, WLAN, Cellular, CAN)
Behavioral, functional and performance modeling
Power and/or performance optimization through simulation & modeling
Simulator architectures and frameworks (C++ or Python-based preferred)
Analytical modeling for performance and power

Responsibilities

Create highly scalable SoC architecture using RISC-V architecture.
Have knowledge in the area of SoC control, boot, reset, timebase management, debug, micro-controllers, etc.
Comprehend product requirements to steer generation of proper architecture.
Perform trade-off analysis in the solution space to produce the most optimal architecture.
Collaborate with architects, technical leads, hardware and software engineers from various functional areas in deriving the architectural solution that can best integrate in the overall SoC.
Generate detail architectural specification and work closely with design team to implement the architecture.