About The Position

In this highly visible role, you will work with a team environment responsible completing partition place and route from netlist to tapeout including automation tasks for Apple SOC! Join us to help deliver the next groundbreaking Apple product!

Requirements

  • Minimum BS degree and 10+ years of relevant industry experience.
  • Familiar with aspects of ASIC integration, including floorplanning, clock and power distribution, global signal planning, I/O planning, and hard IP integration.
  • Experience with scripting and programming skills, including the ability to write maintainable and reusable scripts/programs of medium complexity in suitable languages (TCL/Python).
  • Understanding of industry standard tools for PNR, Voltage Drop Analysis, STA & Layout Verification.
  • Experience with automation for Physical Design, including block execution and using tcl and/or python.
  • Experience of cross-functional collaboration with CAD/Physical Verification/Electrical analysis and PNR Teams to ensure electrically robust power grid.

Nice To Haves

  • Experience with latest technology nodes tapeout is a plus.

Responsibilities

  • Completing partition place and route from netlist to tapeout including automation tasks for Apple SOC.
  • Work multi-functionally with CAD/Physical Verification/Electrical analysis and PnrR Teams to ensure a strong and DRC-clean power grid.
  • Development of features and methodology solutions to be used by a wide range of SOC partitions.
  • Experience with automation for Physical Design, block level execution and experience.
  • Cross-functional collaboration with CAD/Physical Verification/Electrical analysis and PNR Teams to ensure electrically robust power grid.
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